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6 changes: 3 additions & 3 deletions src/clock.jl
Original file line number Diff line number Diff line change
Expand Up @@ -40,17 +40,17 @@ discrete-time systems that assume a fixed sample time, such as PID controllers a
filters.
""" SolverStepClock

isclock(c) = @match c begin
isclock(c) = isa(c, TimeDomain) && @match c begin
PeriodicClock() => true
_ => false
end

issolverstepclock(c) = @match c begin
issolverstepclock(c) = isa(c, TimeDomain) && @match c begin
SolverStepClock() => true
_ => false
end

iscontinuous(c) = @match c begin
iscontinuous(c) = isa(c, TimeDomain) && @match c begin
ContinuousClock() => true
_ => false
end
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3 changes: 3 additions & 0 deletions test/clock.jl
Original file line number Diff line number Diff line change
Expand Up @@ -19,14 +19,17 @@ using MLStyle: @match
@test isclock(PeriodicClock(; dt = 1.0))
@test !isclock(Continuous())
@test !isclock(SolverStepClock())
@test !isclock(nothing)

@test !issolverstepclock(PeriodicClock(; dt = 1.0))
@test !issolverstepclock(Continuous())
@test issolverstepclock(SolverStepClock())
@test !issolverstepclock(nothing)

@test !iscontinuous(PeriodicClock(; dt = 1.0))
@test iscontinuous(Continuous())
@test !iscontinuous(SolverStepClock())
@test !iscontinuous(nothing)

@test is_discrete_time_domain(PeriodicClock(; dt = 1.0))
@test !is_discrete_time_domain(Continuous())
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