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10 | 10 | * The whole nRF pin configuration information is encoded in a 32-bit bitfield |
11 | 11 | * organized as follows: |
12 | 12 | * |
13 | | - * - 31..16: Pin function. |
14 | | - * - 15: Reserved. |
15 | | - * - 14: Pin inversion mode. |
16 | | - * - 13: Pin low power mode. |
17 | | - * - 12..9: Pin output drive configuration. |
18 | | - * - 8..7: Pin pull configuration. |
19 | | - * - 6..0: Pin number (combination of port and pin). |
| 13 | + * - 31..17: Pin function. |
| 14 | + * - 16: Pin inversion mode. |
| 15 | + * - 15: Pin low power mode. |
| 16 | + * - 14..11: Pin output drive configuration. |
| 17 | + * - 10..9: Pin pull configuration. |
| 18 | + * - 8..0: Pin number (combination of port and pin). |
20 | 19 | */ |
21 | 20 |
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22 | 21 | /** |
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25 | 24 | */ |
26 | 25 |
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27 | 26 | /** Position of the function field. */ |
28 | | -#define NRF_FUN_POS 16U |
| 27 | +#define NRF_FUN_POS 17U |
29 | 28 | /** Mask for the function field. */ |
30 | | -#define NRF_FUN_MSK 0xFFFFU |
| 29 | +#define NRF_FUN_MSK 0x7FFFU |
31 | 30 | /** Position of the invert field. */ |
32 | | -#define NRF_INVERT_POS 14U |
| 31 | +#define NRF_INVERT_POS 16U |
33 | 32 | /** Mask for the invert field. */ |
34 | 33 | #define NRF_INVERT_MSK 0x1U |
35 | 34 | /** Position of the low power field. */ |
36 | | -#define NRF_LP_POS 13U |
| 35 | +#define NRF_LP_POS 15U |
37 | 36 | /** Mask for the low power field. */ |
38 | 37 | #define NRF_LP_MSK 0x1U |
39 | 38 | /** Position of the drive configuration field. */ |
40 | | -#define NRF_DRIVE_POS 9U |
| 39 | +#define NRF_DRIVE_POS 11U |
41 | 40 | /** Mask for the drive configuration field. */ |
42 | 41 | #define NRF_DRIVE_MSK 0xFU |
43 | 42 | /** Position of the pull configuration field. */ |
44 | | -#define NRF_PULL_POS 7U |
| 43 | +#define NRF_PULL_POS 9U |
45 | 44 | /** Mask for the pull configuration field. */ |
46 | 45 | #define NRF_PULL_MSK 0x3U |
47 | 46 | /** Position of the pin field. */ |
48 | 47 | #define NRF_PIN_POS 0U |
49 | 48 | /** Mask for the pin field. */ |
50 | | -#define NRF_PIN_MSK 0x7FU |
| 49 | +#define NRF_PIN_MSK 0x1FFU |
51 | 50 |
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52 | 51 | /** @} */ |
53 | 52 |
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218 | 217 | * @brief Utility macro to build nRF psels property entry. |
219 | 218 | * |
220 | 219 | * @param fun Pin function configuration (see NRF_FUNC_{name} macros). |
221 | | - * @param port Port (0 or 1). |
| 220 | + * @param port Port (0 or 15). |
222 | 221 | * @param pin Pin (0..31). |
223 | 222 | */ |
224 | 223 | #define NRF_PSEL(fun, port, pin) \ |
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