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gmarullcarlescufi
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[nrf fromlist] dt-bindings: pinctrl: nrf: allow for more ports
New nRF54H20 SoC series expose more ports, e.g. P9, so reserve more bits for the Port+Pin field. Upstream PR: zephyrproject-rtos#73097 Signed-off-by: Gerard Marull-Paretas <[email protected]> (cherry picked from commit 8ffa1fa)
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include/zephyr/dt-bindings/pinctrl/nrf-pinctrl.h

Lines changed: 14 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -10,13 +10,12 @@
1010
* The whole nRF pin configuration information is encoded in a 32-bit bitfield
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* organized as follows:
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*
13-
* - 31..16: Pin function.
14-
* - 15: Reserved.
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* - 14: Pin inversion mode.
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* - 13: Pin low power mode.
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* - 12..9: Pin output drive configuration.
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* - 8..7: Pin pull configuration.
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* - 6..0: Pin number (combination of port and pin).
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* - 31..17: Pin function.
14+
* - 16: Pin inversion mode.
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* - 15: Pin low power mode.
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* - 14..11: Pin output drive configuration.
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* - 10..9: Pin pull configuration.
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* - 8..0: Pin number (combination of port and pin).
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*/
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/**
@@ -25,29 +24,29 @@
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*/
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/** Position of the function field. */
28-
#define NRF_FUN_POS 16U
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#define NRF_FUN_POS 17U
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/** Mask for the function field. */
30-
#define NRF_FUN_MSK 0xFFFFU
29+
#define NRF_FUN_MSK 0x7FFFU
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/** Position of the invert field. */
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#define NRF_INVERT_POS 14U
31+
#define NRF_INVERT_POS 16U
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/** Mask for the invert field. */
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#define NRF_INVERT_MSK 0x1U
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/** Position of the low power field. */
36-
#define NRF_LP_POS 13U
35+
#define NRF_LP_POS 15U
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/** Mask for the low power field. */
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#define NRF_LP_MSK 0x1U
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/** Position of the drive configuration field. */
40-
#define NRF_DRIVE_POS 9U
39+
#define NRF_DRIVE_POS 11U
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/** Mask for the drive configuration field. */
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#define NRF_DRIVE_MSK 0xFU
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/** Position of the pull configuration field. */
44-
#define NRF_PULL_POS 7U
43+
#define NRF_PULL_POS 9U
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/** Mask for the pull configuration field. */
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#define NRF_PULL_MSK 0x3U
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/** Position of the pin field. */
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#define NRF_PIN_POS 0U
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/** Mask for the pin field. */
50-
#define NRF_PIN_MSK 0x7FU
49+
#define NRF_PIN_MSK 0x1FFU
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/** @} */
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@@ -218,7 +217,7 @@
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* @brief Utility macro to build nRF psels property entry.
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*
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* @param fun Pin function configuration (see NRF_FUNC_{name} macros).
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* @param port Port (0 or 1).
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* @param port Port (0 or 15).
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* @param pin Pin (0..31).
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*/
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#define NRF_PSEL(fun, port, pin) \

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