Skip to content

Commit d46c1a0

Browse files
karlpMaureenHelm
authored andcommitted
stm32/l1: enable spi peripherals
STM32L1 uses the same spi controller as STM32F1 so we can just set the right addresses and enable them. We also need to add the fixup names and to correctly include the header for ST LL HAL. Signed-off-by: Karl Palsson <[email protected]>
1 parent 1c9840c commit d46c1a0

File tree

3 files changed

+40
-0
lines changed

3 files changed

+40
-0
lines changed

dts/arm/st/l1/stm32l1.dtsi

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -72,6 +72,28 @@
7272
label= "I2C_2";
7373
};
7474

75+
spi1: spi@40013000 {
76+
compatible = "st,stm32-spi";
77+
#address-cells = <1>;
78+
#size-cells = <0>;
79+
reg = <0x40013000 0x400>;
80+
clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>;
81+
interrupts = <35 0>;
82+
status = "disabled";
83+
label = "SPI_1";
84+
};
85+
86+
spi2: spi@40003800 {
87+
compatible = "st,stm32-spi";
88+
#address-cells = <1>;
89+
#size-cells = <0>;
90+
reg = <0x40003800 0x400>;
91+
clocks = <&rcc STM32_CLOCK_BUS_APB1 0x00004000>;
92+
interrupts = <36 0>;
93+
status = "disabled";
94+
label = "SPI_2";
95+
};
96+
7597
usart1: serial@40013800 {
7698
compatible = "st,stm32-usart", "st,stm32-uart";
7799
reg = <0x40013800 0x400>;

soc/arm/st_stm32/stm32l1/dts_fixup.h

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -109,6 +109,20 @@
109109
#define DT_I2C_2_CLOCK_BITS DT_ST_STM32_I2C_V1_40005800_CLOCK_BITS
110110
#define DT_I2C_2_CLOCK_BUS DT_ST_STM32_I2C_V1_40005800_CLOCK_BUS
111111

112+
#define DT_SPI_1_BASE_ADDRESS DT_ST_STM32_SPI_40013000_BASE_ADDRESS
113+
#define DT_SPI_1_IRQ_PRI DT_ST_STM32_SPI_40013000_IRQ_0_PRIORITY
114+
#define DT_SPI_1_NAME DT_ST_STM32_SPI_40013000_LABEL
115+
#define DT_SPI_1_IRQ DT_ST_STM32_SPI_40013000_IRQ_0
116+
#define DT_SPI_1_CLOCK_BITS DT_ST_STM32_SPI_40013000_CLOCK_BITS
117+
#define DT_SPI_1_CLOCK_BUS DT_ST_STM32_SPI_40013000_CLOCK_BUS
118+
119+
#define DT_SPI_2_BASE_ADDRESS DT_ST_STM32_SPI_40003800_BASE_ADDRESS
120+
#define DT_SPI_2_IRQ_PRI DT_ST_STM32_SPI_40003800_IRQ_0_PRIORITY
121+
#define DT_SPI_2_NAME DT_ST_STM32_SPI_40003800_LABEL
122+
#define DT_SPI_2_IRQ DT_ST_STM32_SPI_40003800_IRQ_0
123+
#define DT_SPI_2_CLOCK_BITS DT_ST_STM32_SPI_40003800_CLOCK_BITS
124+
#define DT_SPI_2_CLOCK_BUS DT_ST_STM32_SPI_40003800_CLOCK_BUS
125+
112126
#define DT_WWDT_0_BASE_ADDRESS DT_INST_0_ST_STM32_WINDOW_WATCHDOG_BASE_ADDRESS
113127
#define DT_WWDT_0_NAME DT_INST_0_ST_STM32_WINDOW_WATCHDOG_LABEL
114128
#define DT_WWDT_0_IRQ DT_INST_0_ST_STM32_WINDOW_WATCHDOG_IRQ_0

soc/arm/st_stm32/stm32l1/soc.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -51,6 +51,10 @@
5151
#include <stm32l1xx_ll_i2c.h>
5252
#endif
5353

54+
#ifdef CONFIG_SPI_STM32
55+
#include <stm32l1xx_ll_spi.h>
56+
#endif
57+
5458
#ifdef CONFIG_WWDG_STM32
5559
#include <stm32l1xx_ll_wwdg.h>
5660
#endif

0 commit comments

Comments
 (0)