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playfulFenceplayfulFence
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Make C6 ADC calibration work properly again (esp-rs#1911)
* Reverting changes which provoke wrong `ADC` behaviour * Minor example fix * clocks update
1 parent bb6e710 commit 1574e53

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+51
-53
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2 files changed

+51
-53
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‎esp-hal/src/clock/clocks_ll/esp32c6.rs‎

Lines changed: 48 additions & 50 deletions
Original file line numberDiff line numberDiff line change
@@ -253,13 +253,6 @@ const REGI2C_DIG_REG: u8 = 0x6d;
253253
const REGI2C_ULP_CAL: u8 = 0x61;
254254
const REGI2C_SAR_I2C: u8 = 0x69;
255255

256-
const I2C_MST_ANA_CONF1_M: u32 = 0x00FFFFFF;
257-
const REGI2C_BBPLL_RD_MASK: u32 = !(1 << 7) & I2C_MST_ANA_CONF1_M;
258-
const REGI2C_BIAS_RD_MASK: u32 = !(1 << 6) & I2C_MST_ANA_CONF1_M;
259-
const REGI2C_DIG_REG_RD_MASK: u32 = !(1 << 10) & I2C_MST_ANA_CONF1_M;
260-
const REGI2C_ULP_CAL_RD_MASK: u32 = !(1 << 8) & I2C_MST_ANA_CONF1_M;
261-
const REGI2C_SAR_I2C_RD_MASK: u32 = !(1 << 9) & I2C_MST_ANA_CONF1_M;
262-
263256
const REGI2C_RTC_SLAVE_ID_V: u8 = 0xFF;
264257
const REGI2C_RTC_SLAVE_ID_S: u8 = 0;
265258
const REGI2C_RTC_ADDR_V: u8 = 0xFF;
@@ -271,53 +264,59 @@ const REGI2C_RTC_DATA_S: u8 = 16;
271264

272265
const REGI2C_BBPLL: u8 = 0x66;
273266

267+
const REGI2C_BBPLL_DEVICE_EN: u16 = 1 << 5;
268+
const REGI2C_BIAS_DEVICE_EN: u16 = 1 << 4;
269+
const REGI2C_DIG_REG_DEVICE_EN: u16 = 1 << 8;
270+
const REGI2C_ULP_CAL_DEVICE_EN: u16 = 1 << 6;
271+
const REGI2C_SAR_I2C_DEVICE_EN: u16 = 1 << 7;
272+
274273
fn regi2c_enable_block(block: u8) {
275274
let modem_lpcon = unsafe { &*crate::peripherals::MODEM_LPCON::ptr() };
276275
let lp_i2c_ana = unsafe { &*crate::peripherals::LP_I2C_ANA_MST::ptr() };
277276

278-
unsafe {
279-
modem_lpcon
280-
.clk_conf()
281-
.modify(|_, w| w.clk_i2c_mst_en().set_bit());
277+
modem_lpcon
278+
.clk_conf()
279+
.modify(|_, w| w.clk_i2c_mst_en().set_bit());
282280

283-
modem_lpcon
284-
.i2c_mst_clk_conf()
285-
.modify(|_, w| w.clk_i2c_mst_sel_160m().set_bit());
281+
modem_lpcon
282+
.i2c_mst_clk_conf()
283+
.modify(|_, w| w.clk_i2c_mst_sel_160m().set_bit());
286284

287-
lp_i2c_ana
288-
.date()
289-
.modify(|_, w| w.lp_i2c_ana_mast_i2c_mat_clk_en().set_bit());
285+
lp_i2c_ana
286+
.date()
287+
.modify(|_, w| w.lp_i2c_ana_mast_i2c_mat_clk_en().set_bit());
290288

291-
// Before config I2C register, enable corresponding slave.
289+
// Before config I2C register, enable corresponding slave.
290+
unsafe {
292291
match block {
293292
REGI2C_BBPLL => {
294-
lp_i2c_ana.ana_conf1().modify(|r, w| {
295-
w.lp_i2c_ana_mast_ana_conf1()
296-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() | REGI2C_BBPLL_RD_MASK)
293+
lp_i2c_ana.device_en().modify(|r, w| {
294+
w.lp_i2c_ana_mast_i2c_device_en()
295+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() | REGI2C_BBPLL_DEVICE_EN)
297296
});
298297
}
299298
REGI2C_BIAS => {
300-
lp_i2c_ana.ana_conf1().modify(|r, w| {
301-
w.lp_i2c_ana_mast_ana_conf1()
302-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() | REGI2C_BIAS_RD_MASK)
299+
lp_i2c_ana.device_en().modify(|r, w| {
300+
w.lp_i2c_ana_mast_i2c_device_en()
301+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() | REGI2C_BIAS_DEVICE_EN)
303302
});
304303
}
305304
REGI2C_DIG_REG => {
306-
lp_i2c_ana.ana_conf1().modify(|r, w| {
307-
w.lp_i2c_ana_mast_ana_conf1()
308-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() | REGI2C_DIG_REG_RD_MASK)
305+
lp_i2c_ana.device_en().modify(|r, w| {
306+
w.lp_i2c_ana_mast_i2c_device_en()
307+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() | REGI2C_DIG_REG_DEVICE_EN)
309308
});
310309
}
311310
REGI2C_ULP_CAL => {
312-
lp_i2c_ana.ana_conf1().modify(|r, w| {
313-
w.lp_i2c_ana_mast_ana_conf1()
314-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() | REGI2C_ULP_CAL_RD_MASK)
311+
lp_i2c_ana.device_en().modify(|r, w| {
312+
w.lp_i2c_ana_mast_i2c_device_en()
313+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() | REGI2C_ULP_CAL_DEVICE_EN)
315314
});
316315
}
317316
REGI2C_SAR_I2C => {
318-
lp_i2c_ana.ana_conf1().modify(|r, w| {
319-
w.lp_i2c_ana_mast_ana_conf1()
320-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() | REGI2C_SAR_I2C_RD_MASK)
317+
lp_i2c_ana.device_en().modify(|r, w| {
318+
w.lp_i2c_ana_mast_i2c_device_en()
319+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() | REGI2C_SAR_I2C_DEVICE_EN)
321320
});
322321
}
323322
_ => (),
@@ -326,38 +325,37 @@ fn regi2c_enable_block(block: u8) {
326325
}
327326

328327
fn regi2c_disable_block(block: u8) {
329-
let lp_i2c_ana = unsafe { &*crate::peripherals::LP_I2C_ANA_MST::ptr() };
330-
331328
unsafe {
329+
let lp_i2c_ana = &*crate::peripherals::LP_I2C_ANA_MST::ptr();
332330
match block {
333331
REGI2C_BBPLL => {
334-
lp_i2c_ana.ana_conf1().modify(|r, w| {
335-
w.lp_i2c_ana_mast_ana_conf1()
336-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() & !REGI2C_BBPLL_RD_MASK)
332+
lp_i2c_ana.device_en().modify(|r, w| {
333+
w.lp_i2c_ana_mast_i2c_device_en()
334+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() & !REGI2C_BBPLL_DEVICE_EN)
337335
});
338336
}
339337
REGI2C_BIAS => {
340-
lp_i2c_ana.ana_conf1().modify(|r, w| {
341-
w.lp_i2c_ana_mast_ana_conf1()
342-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() & !REGI2C_BIAS_RD_MASK)
338+
lp_i2c_ana.device_en().modify(|r, w| {
339+
w.lp_i2c_ana_mast_i2c_device_en()
340+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() & !REGI2C_BIAS_DEVICE_EN)
343341
});
344342
}
345343
REGI2C_DIG_REG => {
346-
lp_i2c_ana.ana_conf1().modify(|r, w| {
347-
w.lp_i2c_ana_mast_ana_conf1()
348-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() & !REGI2C_DIG_REG_RD_MASK)
344+
lp_i2c_ana.device_en().modify(|r, w| {
345+
w.lp_i2c_ana_mast_i2c_device_en()
346+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() & !REGI2C_DIG_REG_DEVICE_EN)
349347
});
350348
}
351349
REGI2C_ULP_CAL => {
352-
lp_i2c_ana.ana_conf1().modify(|r, w| {
353-
w.lp_i2c_ana_mast_ana_conf1()
354-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() & !REGI2C_ULP_CAL_RD_MASK)
350+
lp_i2c_ana.device_en().modify(|r, w| {
351+
w.lp_i2c_ana_mast_i2c_device_en()
352+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() & !REGI2C_ULP_CAL_DEVICE_EN)
355353
});
356354
}
357355
REGI2C_SAR_I2C => {
358-
lp_i2c_ana.ana_conf1().modify(|r, w| {
359-
w.lp_i2c_ana_mast_ana_conf1()
360-
.bits(r.lp_i2c_ana_mast_ana_conf1().bits() & !REGI2C_SAR_I2C_RD_MASK)
356+
lp_i2c_ana.device_en().modify(|r, w| {
357+
w.lp_i2c_ana_mast_i2c_device_en()
358+
.bits(r.lp_i2c_ana_mast_i2c_device_en().bits() & !REGI2C_SAR_I2C_DEVICE_EN)
361359
});
362360
}
363361
_ => (),

‎examples/src/bin/adc_cal.rs‎

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -44,10 +44,10 @@ fn main() -> ! {
4444
// them. Note that only AdcCalLine returns readings in mV; the other two
4545
// return raw readings in some unspecified scale.
4646
//
47-
//type AdcCal = ();
47+
// type AdcCal = ();
4848
type AdcCal = esp_hal::analog::adc::AdcCalBasic<esp_hal::peripherals::ADC1>;
49-
// type AdcCal = esp_hal::analog::adc::AdcCalLine<ADC1>;
50-
// type AdcCal = esp_hal::analog::adc::AdcCalCurve<ADC1>;
49+
// type AdcCal = esp_hal::analog::adc::AdcCalLine<esp_hal::peripherals::ADC1>;
50+
// type AdcCal = esp_hal::analog::adc::AdcCalCurve<esp_hal::peripherals::ADC1>;
5151

5252
let mut adc1_config = AdcConfig::new();
5353
let mut adc1_pin =

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