Notice that some UART peripherals have only PCLK as source

For some devices of the stm32f3 family, the source clock
can not be adjusted and can only be the peripheral clock (PCLK).

As usartXsw() (where X = 1, 2 or 3) would be called directly
in any case, it would not compile for peripheral, which do not have
this flag in their CFGR3 register.

To circumvent this issue, split out the clock logic into it's own macro,
which then can declare, which peripheral has a variable clock source
and which have not.

This conditional check can not be introduced in the former macro
definition, as it is not possible to change the behavior of the macro
depending on a type or name of an identifier.

Author: Sh3Rm4n

src/serial.rs

@@ -12,11 +12,14 @@ use core::{convert::Infallible, ops::Deref};
 use crate::{
     gpio::{gpioa, gpiob, gpioc, AF7},
     hal::{blocking, serial},
-    pac::{self, rcc::cfgr3::USART1SW_A, usart1::RegisterBlock, RCC, USART1, USART2, USART3},
+    pac::{self, rcc::cfgr3::USART1SW_A, usart1::RegisterBlock, USART1, USART2, USART3},
     rcc::{Clocks, APB1, APB2},
     time::rate::*,
 };
 
+#[allow(unused_imports)]
+use crate::pac::RCC;
+
 use cfg_if::cfg_if;
 
 cfg_if! {
@@ -492,35 +495,32 @@ pub trait Instance: Deref<Target = RegisterBlock> + private::Sealed {
 }
 
 macro_rules! usart {
-    ($($USARTX:ident: ($usartXen:ident, $APB:ident, $pclkX:ident, $usartXrst:ident, $usartXsw:ident),)+) => {
+    (
+        $(
+            $USARTX:ident: (
+                $usartXen:ident,
+                $APB:ident,
+                $pclkX:ident,
+                $usartXrst:ident,
+                $usartXsw:ident,
+                $usartXclock:ident
+            ),
+        )+
+    ) => {
         $(
             impl private::Sealed for $USARTX {}
             impl Instance for $USARTX {
                 type APB = $APB;
                 fn enable_clock(apb: &mut Self::APB) {
                     apb.enr().modify(|_, w| w.$usartXen().enabled());
                     apb.rstr().modify(|_, w| w.$usartXrst().reset());
-                    apb.rstr().modify(|_, w| w.$usartXrst().clear_bit());
                 }
 
                 fn clock(clocks: &Clocks) -> Hertz {
-                    // NOTE(unsafe) atomic read with no side effects
-
-                    // This is only partly sovable by this. The macro has to be adjusted, to give
-                    // information about, if sw is avalible for the uart implementation or not
-                    cfg_if::cfg_if! {
-                        if #[cfg(any(feature = "svd-f301", feature = "svd-f3x4"))] {
-                            clocks.$pclkX()
-                        } else {
-                            // FIXME usart2sw() is not avalible for stm32f318x8 for example
-                            match unsafe { (*RCC::ptr()).cfgr3.read().$usartXsw().variant() } {
-                                USART1SW_A::PCLK => clocks.$pclkX(),
-                                USART1SW_A::HSI => crate::rcc::HSI,
-                                USART1SW_A::SYSCLK => clocks.sysclk(),
-                                USART1SW_A::LSE => crate::rcc::LSE,
-                            }
-                        }
-                    }
+                    // Use the function created via another macro outside of this one,
+                    // because the implementation is dependend on the type $USARTX.
+                    // But macros can not differentiate between types.
+                    $usartXclock(clocks)
                 }
             }
 
@@ -552,12 +552,79 @@ macro_rules! usart {
     ([ $(($X:literal, $APB:literal)),+ ]) => {
         paste::paste! {
             usart!(
-                $([<USART $X>]: ([<usart $X en>], [<APB $APB>], [<pclk $APB>], [<usart $X rst>], [<usart $X sw>]),)+
+                $(
+                    [<USART $X>]: (
+                        [<usart $X en>],
+                        [<APB $APB>],
+                        [<pclk $APB>],
+                        [<usart $X rst>],
+                        [<usart $X sw>],
+                        [<usart $X clock>]
+                    ),
+                )+
+            );
+        }
+    };
+}
+
+/// Generates a clock function for UART Peripherals, where
+/// the only clock source can be the peripheral clock
+#[allow(unused_macros)]
+macro_rules! usart_static_clock {
+    ($($usartXclock:ident, $pclkX:ident),+) => {
+        $(
+            /// Return the currently set source frequency the UART peripheral
+            /// depending on the clock source.
+            fn $usartXclock(clocks: &Clocks) -> Hertz {
+                clocks.$pclkX()
+            }
+        )+
+    };
+    ([ $(($X:literal, $APB:literal)),+ ]) => {
+        paste::paste! {
+            usart_static_clock!(
+                $([<usart $X clock>], [<pclk $APB>]),+
             );
         }
     };
 }
 
-usart!([(1, 2)]);
-usart!([(2, 1)]);
-usart!([(3, 1)]);
+/// Generates a clock function for UART Peripherals, where
+/// the clock source can vary.
+macro_rules! usart_var_clock {
+    ($($usartXclock:ident, $usartXsw:ident, $pclkX:ident),+) => {
+        $(
+            /// Return the currently set source frequency the UART peripheral
+            /// depending on the clock source.
+            fn $usartXclock(clocks: &Clocks) -> Hertz {
+                // NOTE(unsafe): atomic read with no side effects
+                match unsafe {(*RCC::ptr()).cfgr3.read().$usartXsw().variant()} {
+                    USART1SW_A::PCLK => clocks.$pclkX(),
+                    USART1SW_A::HSI => crate::rcc::HSI,
+                    USART1SW_A::SYSCLK => clocks.sysclk(),
+                    USART1SW_A::LSE => crate::rcc::LSE,
+                }
+            }
+        )+
+    };
+    ([ $(($X:literal, $APB:literal)),+ ]) => {
+        paste::paste! {
+            usart_var_clock!(
+                $([<usart $X clock>], [<usart $X sw>], [<pclk $APB>]),+
+            );
+        }
+    };
+}
+
+cfg_if::cfg_if! {
+    if #[cfg(any(feature = "svd-f301", feature = "svd-f3x4"))] {
+        usart_var_clock!([(1,2)]);
+        // These are uart peripherals, where the only clock source
+        // is the PCLK (peripheral clock).
+        usart_static_clock!([(2,1), (3,1)]);
+    } else {
+        usart_var_clock!([(1, 2), (2, 1), (3, 1)]);
+    }
+}
+// TODO: what about uart 4 and uart 5?
+usart!([(1, 2), (2, 1), (3, 1)]);