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video: Add MT9M114 serial camera configuration
- Add MT9M114 serial camera overlay files for selfie and standard modes - Add MT9M114 configuration files with buffer settings and regulator config - Update main.c to display resolution in buffer info logs - Remove unnecessary blank lines in main.c - Update west.yml for module dependencies This PR depends on: alifsemi/zephyr_alif#463
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CONFIG_VIDEO_MIPI_CSI2_DW=y
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CONFIG_VIDEO_BUFFER_POOL_SZ_MAX=1900000
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CONFIG_VIDEO_BUFFER_POOL_NUM_MAX=2
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CONFIG_REGULATOR=y
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CONFIG_REGULATOR_FIXED_INIT_PRIORITY=40
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CONFIG_MT9M114_PARALLEL_INIT=n
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CONFIG_MAIN_STACK_SIZE=8192
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CONFIG_SYSTEM_WORKQUEUE_STACK_SIZE=4096
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CONFIG_THREAD_NAME=y
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/* Copyright (C) 2026 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code are permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement.
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*/
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#include <dt-bindings/pinctrl/ensemble-pinctrl.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/video/video-interfaces.h>
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&gpio7 {
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status = "okay";
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};
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/ {
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csi_cam_power: regulator-v1.2-v1.8v {
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compatible = "regulator-fixed";
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regulator-name = "MIPI supply";
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enable-gpios = < &gpio7 5 GPIO_ACTIVE_HIGH >;
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regulator-boot-on;
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regulator-always-on;
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status = "okay";
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};
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};
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&gpio9 {
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status = "okay";
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};
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&i2c1 {
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status = "okay";
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clock-frequency = <I2C_BITRATE_FAST>;
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/*
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* For Standard speed LCNT=0 and HCNT=0
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* For Fast speed LCNT=50 and HCNT=30
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* For Fast Plus speed LCNT=35 and HCNT=5
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*/
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hcnt-offset = <30>;
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lcnt-offset = <50>;
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mt9m114: mt9m114@5d {
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compatible = "aptina,mt9m114";
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reg = <0x5d>;
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pinctrl-0 = < &pinctrl_cam_xvclk >;
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pinctrl-names = "default";
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reset-gpios = <&gpio9 1 GPIO_ACTIVE_LOW>;
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status = "okay";
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port {
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mt9m114_csi2_ep_out: endpoint {
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bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
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link-frequencies = < 384000000 >;
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data-lanes = <0x1>;
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clock-lane = <0>;
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remote-endpoint-label = "csi2_ep_in";
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};
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};
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};
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};
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&cam {
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status = "okay";
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pinctrl-0 = <&pinctrl_cam_xvclk>;
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pinctrl-names = "default";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* MIPI CSI-2 bus endpoint. */
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port@0 {
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reg = <0>;
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cam_csi2_ep_in: endpoint {
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remote-endpoint-label = "csi2_ep_out";
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};
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};
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/* Video buffer output endpoint. */
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port@1 {
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reg = <1>;
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cam_mem_ep_out: endpoint {
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remote-endpoint-label = "application";
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};
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};
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};
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};
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&csi {
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status = "okay";
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/* RX-DPHY */
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phy-if = <&dphy 0>;
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csi-hact = <640>;
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csi-vact = <480>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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csi2_ep_in: endpoint {
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bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
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link-frequencies = <384000000>;
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data-lanes = <1>;
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clock-lane = <0>;
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remote-endpoint-label = "mt9m114_csi2_ep_out";
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};
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};
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port@2 {
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reg = <2>;
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csi2_ep_out: endpoint {
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remote-endpoint-label = "cam_csi2_ep_in";
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bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
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};
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};
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};
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};
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&mipi_dsi {
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status = "okay";
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};
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/* Copyright (C) 2026 Alif Semiconductor - All Rights Reserved.
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* Use, distribution and modification of this code are permitted under the
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* terms stated in the Alif Semiconductor Software License Agreement.
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*
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* You should have received a copy of the Alif Semiconductor Software
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* License Agreement with this file. If not, please write to:
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* contact@alifsemi.com, or visit: https://alifsemi.com/license
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*/
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#include <dt-bindings/pinctrl/ensemble-pinctrl.h>
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#include <dt-bindings/i2c/i2c.h>
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/video/video-interfaces.h>
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&i2c1 {
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status = "okay";
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};
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&gpio7 {
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status = "okay";
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};
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&gpio14 {
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status = "okay";
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};
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/ {
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csi_cam_power: regulator-v1.2-v1.8v {
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compatible = "regulator-fixed";
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regulator-name = "MIPI supply";
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enable-gpios = < &gpio7 5 GPIO_ACTIVE_HIGH >;
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regulator-boot-on;
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regulator-always-on;
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status = "okay";
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};
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i2c_mux: i2c-mux {
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compatible = "gpio-i2c-mux";
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status = "okay";
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#address-cells = <1>;
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#size-cells = <0>;
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i2c-inst = <&i2c1>;
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ctrl-gpios = <&gpio14 3 GPIO_ACTIVE_HIGH>;
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mux_i2c@0 {
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compatible = "gpio-i2c-mux-channel";
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reg = <0>;
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#address-cells = <1>;
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#size-cells = <0>;
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mt9m114_selfie: mt9m114_selfie@5d {
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compatible = "aptina,mt9m114";
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reg = <0x5d>;
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reset-gpios = <&gpio14 4 GPIO_ACTIVE_HIGH>;
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status = "okay";
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port {
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mt9m114_csi2_ep_out0: endpoint {
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bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
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link-frequencies = < 384000000 >;
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data-lanes = <1>;
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clock-lane = <0>;
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remote-endpoint-label = "csi2_ep_in0";
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};
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};
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};
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};
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};
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};
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&isp {
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status = "okay";
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port {
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isp_ep_in: endpoint {
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remote-endpoint-label = "cam_isp_ep_out";
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};
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};
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};
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&cam {
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status = "okay";
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pinctrl-0 = <&pinctrl_cam_xvclk>;
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pinctrl-names = "default";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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/* MIPI CSI-2 bus endpoint. */
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port@0 {
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reg = <0>;
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cam_csi2_ep_in: endpoint {
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remote-endpoint-label = "csi2_ep_out";
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};
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};
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/* ISP Interface. */
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port@2 {
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reg = <2>;
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cam_isp_ep_out: endpoint {
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remote-endpoint-label = "isp_ep_in";
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};
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};
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};
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};
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&csi {
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status = "okay";
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/* Selfie camera D-PHY*/
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phy-if = <&dphy 0>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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csi2_ep_in0: endpoint {
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bus-type = <VIDEO_BUS_TYPE_CSI2_DPHY>;
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link-frequencies = < 384000000 >;
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data-lanes = <1>;
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clock-lane = <0>;
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remote-endpoint-label = "mt9m114_csi2_ep_out0";
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};
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};
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port@2 {
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reg = <2>;
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csi2_ep_out: endpoint {
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remote-endpoint-label = "cam_csi2_ep_in";
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bus-type = <VIDEO_BUS_TYPE_PARALLEL>;
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};
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};
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};
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};

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