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nirvdrumnirvdrum
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ZJIT: Use VALUE_BITS constant for memory operands
1 parent 1de87dd commit c441ba1

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5 files changed

+123
-123
lines changed

5 files changed

+123
-123
lines changed

‎zjit/src/backend/arm64/mod.rs‎

Lines changed: 28 additions & 28 deletions
Original file line numberDiff line numberDiff line change
@@ -880,7 +880,7 @@ impl Assembler {
880880
// It's split here to support IncrCounter in compile_exits.
881881
assert!(matches!(mem, Opnd::UImm(_)));
882882
asm.load_into(SCRATCH0_OPND, mem);
883-
asm.lea_into(SCRATCH0_OPND, Opnd::mem(64, SCRATCH0_OPND, 0));
883+
asm.lea_into(SCRATCH0_OPND, Opnd::mem(VALUE_BITS, SCRATCH0_OPND, 0));
884884

885885
// Create a local loop to atomically increment a counter using SCRATCH1_OPND to check if it succeeded.
886886
// Note that arm64_emit will peek at the next Cmp to set a status into SCRATCH1_OPND on IncrCounter.
@@ -1741,13 +1741,13 @@ mod tests {
17411741
asm.frame_setup(JIT_PRESERVED_REGS);
17421742

17431743
let val64 = asm.add(CFP, Opnd::UImm(64));
1744-
asm.store(Opnd::mem(64, SP, 0x10), val64);
1744+
asm.store(Opnd::mem(VALUE_BITS, SP, 0x10), val64);
17451745
let side_exit = Target::SideExit { reason: SideExitReason::Interrupt, exit: SideExit { pc: Opnd::const_ptr(0 as *const u8), stack: vec![], locals: vec![] } };
17461746
asm.push_insn(Insn::Joz(val64, side_exit));
1747-
asm.parallel_mov(vec![(C_ARG_OPNDS[0], C_RET_OPND.with_num_bits(32)), (C_ARG_OPNDS[1], Opnd::mem(64, SP, -8))]);
1747+
asm.parallel_mov(vec![(C_ARG_OPNDS[0], C_RET_OPND.with_num_bits(32)), (C_ARG_OPNDS[1], Opnd::mem(VALUE_BITS, SP, -8))]);
17481748

17491749
let val32 = asm.sub(Opnd::Value(Qtrue), Opnd::Imm(1));
1750-
asm.store(Opnd::mem(64, EC, 0x10).with_num_bits(32), val32.with_num_bits(32));
1750+
asm.store(Opnd::mem(VALUE_BITS, EC, 0x10).with_num_bits(32), val32.with_num_bits(32));
17511751
asm.je(label);
17521752
asm.cret(val64);
17531753

@@ -1861,7 +1861,7 @@ mod tests {
18611861
fn no_dead_mov_from_vreg() {
18621862
let (mut asm, mut cb) = setup_asm();
18631863

1864-
let ret_val = asm.load(Opnd::mem(64, C_RET_OPND, 0));
1864+
let ret_val = asm.load(Opnd::mem(VALUE_BITS, C_RET_OPND, 0));
18651865
asm.cret(ret_val);
18661866

18671867
asm.compile_with_num_regs(&mut cb, 1);
@@ -1877,7 +1877,7 @@ mod tests {
18771877
let (mut asm, mut cb) = setup_asm();
18781878

18791879
let opnd = asm.add(Opnd::Reg(X0_REG), Opnd::Reg(X1_REG));
1880-
asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd);
1880+
asm.store(Opnd::mem(VALUE_BITS, Opnd::Reg(X2_REG), 0), opnd);
18811881
asm.compile_with_regs(&mut cb, vec![X3_REG]).unwrap();
18821882

18831883
// Assert that only 2 instructions were written.
@@ -2046,7 +2046,7 @@ mod tests {
20462046
// - 16 bit MOV family shifted immediates
20472047
// - bit mask immediates
20482048
for displacement in [i32::MAX, 0x10008, 0x1800, 0x208, -0x208, -0x1800, -0x10008, i32::MIN] {
2049-
let mem = Opnd::mem(64, NATIVE_STACK_PTR, displacement);
2049+
let mem = Opnd::mem(VALUE_BITS, NATIVE_STACK_PTR, displacement);
20502050
asm.lea_into(Opnd::Reg(X0_REG), mem);
20512051
}
20522052

@@ -2078,7 +2078,7 @@ mod tests {
20782078
fn test_load_larg_disp_mem() {
20792079
let (mut asm, mut cb) = setup_asm();
20802080

2081-
let extended_ivars = asm.load(Opnd::mem(64, NATIVE_STACK_PTR, 0));
2081+
let extended_ivars = asm.load(Opnd::mem(VALUE_BITS, NATIVE_STACK_PTR, 0));
20822082
let result = asm.load(Opnd::mem(VALUE_BITS, extended_ivars, 1000 * SIZEOF_VALUE_I32));
20832083
asm.store(Opnd::mem(VALUE_BITS, NATIVE_STACK_PTR, 0), result);
20842084

@@ -2098,8 +2098,8 @@ mod tests {
20982098
let (mut asm, mut cb) = setup_asm();
20992099

21002100
// Large memory offsets in combinations of destination and source
2101-
let large_mem = Opnd::mem(64, NATIVE_STACK_PTR, -0x305);
2102-
let small_mem = Opnd::mem(64, C_RET_OPND, 0);
2101+
let large_mem = Opnd::mem(VALUE_BITS, NATIVE_STACK_PTR, -0x305);
2102+
let small_mem = Opnd::mem(VALUE_BITS, C_RET_OPND, 0);
21032103
asm.store(small_mem, large_mem);
21042104
asm.store(large_mem, small_mem);
21052105
asm.store(large_mem, large_mem);
@@ -2148,7 +2148,7 @@ mod tests {
21482148
let (mut asm, scratch_reg) = Assembler::new_with_scratch_reg();
21492149
asm.new_block_without_id();
21502150
let mut cb = CodeBlock::new_dummy();
2151-
asm.store(Opnd::mem(64, scratch_reg, 0), 0x83902.into());
2151+
asm.store(Opnd::mem(VALUE_BITS, scratch_reg, 0), 0x83902.into());
21522152

21532153
asm.compile_with_num_regs(&mut cb, 0);
21542154
assert_disasm_snapshot!(cb.disasm(), @r"
@@ -2165,7 +2165,7 @@ mod tests {
21652165
let (_, scratch_reg) = Assembler::new_with_scratch_reg();
21662166
let (mut asm, mut cb) = setup_asm();
21672167
// This would put the source into scratch_reg, messing up the destination
2168-
asm.store(Opnd::mem(64, scratch_reg, 0), 0x83902.into());
2168+
asm.store(Opnd::mem(VALUE_BITS, scratch_reg, 0), 0x83902.into());
21692169

21702170
asm.compile_with_num_regs(&mut cb, 0);
21712171
}
@@ -2190,7 +2190,7 @@ mod tests {
21902190

21912191
asm.write_label(label);
21922192
asm.bake_string("Hello, world!");
2193-
asm.store(Opnd::mem(64, SP, 0), opnd);
2193+
asm.store(Opnd::mem(VALUE_BITS, SP, 0), opnd);
21942194

21952195
asm.compile_with_num_regs(&mut cb, 1);
21962196
assert_disasm_snapshot!(cb.disasm(), @r"
@@ -2209,8 +2209,8 @@ mod tests {
22092209
fn test_emit_load_mem_disp_fits_into_load() {
22102210
let (mut asm, mut cb) = setup_asm();
22112211

2212-
let opnd = asm.load(Opnd::mem(64, SP, 0));
2213-
asm.store(Opnd::mem(64, SP, 0), opnd);
2212+
let opnd = asm.load(Opnd::mem(VALUE_BITS, SP, 0));
2213+
asm.store(Opnd::mem(VALUE_BITS, SP, 0), opnd);
22142214
asm.compile_with_num_regs(&mut cb, 1);
22152215

22162216
// Assert that two instructions were written: LDUR and STUR.
@@ -2225,8 +2225,8 @@ mod tests {
22252225
fn test_emit_load_mem_disp_fits_into_add() {
22262226
let (mut asm, mut cb) = setup_asm();
22272227

2228-
let opnd = asm.load(Opnd::mem(64, SP, 1 << 10));
2229-
asm.store(Opnd::mem(64, SP, 0), opnd);
2228+
let opnd = asm.load(Opnd::mem(VALUE_BITS, SP, 1 << 10));
2229+
asm.store(Opnd::mem(VALUE_BITS, SP, 0), opnd);
22302230
asm.compile_with_num_regs(&mut cb, 1);
22312231

22322232
// Assert that three instructions were written: ADD, LDUR, and STUR.
@@ -2242,8 +2242,8 @@ mod tests {
22422242
fn test_emit_load_mem_disp_does_not_fit_into_add() {
22432243
let (mut asm, mut cb) = setup_asm();
22442244

2245-
let opnd = asm.load(Opnd::mem(64, SP, 1 << 12 | 1));
2246-
asm.store(Opnd::mem(64, SP, 0), opnd);
2245+
let opnd = asm.load(Opnd::mem(VALUE_BITS, SP, 1 << 12 | 1));
2246+
asm.store(Opnd::mem(VALUE_BITS, SP, 0), opnd);
22472247
asm.compile_with_num_regs(&mut cb, 1);
22482248

22492249
// Assert that three instructions were written: MOVZ, ADD, LDUR, and STUR.
@@ -2261,7 +2261,7 @@ mod tests {
22612261
let (mut asm, mut cb) = setup_asm();
22622262

22632263
let opnd = asm.load(Opnd::Value(Qnil));
2264-
asm.store(Opnd::mem(64, SP, 0), opnd);
2264+
asm.store(Opnd::mem(VALUE_BITS, SP, 0), opnd);
22652265
asm.compile_with_num_regs(&mut cb, 1);
22662266

22672267
// Assert that only two instructions were written since the value is an
@@ -2278,7 +2278,7 @@ mod tests {
22782278
let (mut asm, mut cb) = setup_asm();
22792279

22802280
let opnd = asm.load(Opnd::Value(VALUE(0xCAFECAFECAFE0000)));
2281-
asm.store(Opnd::mem(64, SP, 0), opnd);
2281+
asm.store(Opnd::mem(VALUE_BITS, SP, 0), opnd);
22822282
asm.compile_with_num_regs(&mut cb, 1);
22832283

22842284
// Assert that five instructions were written since the value is not an
@@ -2325,7 +2325,7 @@ mod tests {
23252325
let (mut asm, mut cb) = setup_asm();
23262326

23272327
let opnd = asm.or(Opnd::Reg(X0_REG), Opnd::Reg(X1_REG));
2328-
asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd);
2328+
asm.store(Opnd::mem(VALUE_BITS, Opnd::Reg(X2_REG), 0), opnd);
23292329
asm.compile_with_num_regs(&mut cb, 1);
23302330

23312331
assert_disasm_snapshot!(cb.disasm(), @r"
@@ -2340,7 +2340,7 @@ mod tests {
23402340
let (mut asm, mut cb) = setup_asm();
23412341

23422342
let opnd = asm.lshift(Opnd::Reg(X0_REG), Opnd::UImm(5));
2343-
asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd);
2343+
asm.store(Opnd::mem(VALUE_BITS, Opnd::Reg(X2_REG), 0), opnd);
23442344
asm.compile_with_num_regs(&mut cb, 1);
23452345

23462346
assert_disasm_snapshot!(cb.disasm(), @r"
@@ -2355,7 +2355,7 @@ mod tests {
23552355
let (mut asm, mut cb) = setup_asm();
23562356

23572357
let opnd = asm.rshift(Opnd::Reg(X0_REG), Opnd::UImm(5));
2358-
asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd);
2358+
asm.store(Opnd::mem(VALUE_BITS, Opnd::Reg(X2_REG), 0), opnd);
23592359
asm.compile_with_num_regs(&mut cb, 1);
23602360

23612361
assert_disasm_snapshot!(cb.disasm(), @r"
@@ -2370,7 +2370,7 @@ mod tests {
23702370
let (mut asm, mut cb) = setup_asm();
23712371

23722372
let opnd = asm.urshift(Opnd::Reg(X0_REG), Opnd::UImm(5));
2373-
asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd);
2373+
asm.store(Opnd::mem(VALUE_BITS, Opnd::Reg(X2_REG), 0), opnd);
23742374
asm.compile_with_num_regs(&mut cb, 1);
23752375

23762376
assert_disasm_snapshot!(cb.disasm(), @r"
@@ -2509,7 +2509,7 @@ mod tests {
25092509
let (mut asm, mut cb) = setup_asm();
25102510

25112511
let opnd = asm.xor(Opnd::Reg(X0_REG), Opnd::Reg(X1_REG));
2512-
asm.store(Opnd::mem(64, Opnd::Reg(X2_REG), 0), opnd);
2512+
asm.store(Opnd::mem(VALUE_BITS, Opnd::Reg(X2_REG), 0), opnd);
25132513

25142514
asm.compile_with_num_regs(&mut cb, 1);
25152515

@@ -2548,7 +2548,7 @@ mod tests {
25482548
fn test_replace_mov_with_ldur() {
25492549
let (mut asm, mut cb) = setup_asm();
25502550

2551-
asm.mov(Opnd::Reg(TEMP_REGS[0]), Opnd::mem(64, CFP, 8));
2551+
asm.mov(Opnd::Reg(TEMP_REGS[0]), Opnd::mem(VALUE_BITS, CFP, 8));
25522552
asm.compile_with_num_regs(&mut cb, 1);
25532553

25542554
assert_disasm_snapshot!(cb.disasm(), @" 0x0: ldur x1, [x19, #8]");
@@ -2888,7 +2888,7 @@ mod tests {
28882888
fn test_split_load64_mem_mem_with_large_displacement() {
28892889
let (mut asm, mut cb) = setup_asm();
28902890

2891-
let _ = asm.load(Opnd::mem(64, C_RET_OPND, 0x200));
2891+
let _ = asm.load(Opnd::mem(VALUE_BITS, C_RET_OPND, 0x200));
28922892
asm.compile(&mut cb).unwrap();
28932893

28942894
assert_disasm_snapshot!(cb.disasm(), @r"

‎zjit/src/backend/lir.rs‎

Lines changed: 21 additions & 21 deletions
Original file line numberDiff line numberDiff line change
@@ -5,7 +5,7 @@ use std::panic;
55
use std::rc::Rc;
66
use std::sync::{Arc, Mutex};
77
use crate::codegen::local_size_and_idx_to_ep_offset;
8-
use crate::cruby::{Qundef, RUBY_OFFSET_CFP_PC, RUBY_OFFSET_CFP_SP, SIZEOF_VALUE_I32, vm_stack_canary};
8+
use crate::cruby::{Qundef, RUBY_OFFSET_CFP_PC, RUBY_OFFSET_CFP_SP, SIZEOF_VALUE_I32, VALUE_BITS, vm_stack_canary};
99
use crate::hir::{Invariant, SideExitReason};
1010
use crate::hir;
1111
use crate::options::{TraceExits, debug, get_option};
@@ -1380,13 +1380,13 @@ impl StackState {
13801380
for stack_idx in 0..self.stack_size {
13811381
if self.stack_slots[stack_idx].is_none() {
13821382
self.stack_slots[stack_idx] = Some(vreg_idx);
1383-
return Opnd::mem(64, NATIVE_BASE_PTR, self.stack_idx_to_disp(stack_idx));
1383+
return Opnd::mem(VALUE_BITS, NATIVE_BASE_PTR, self.stack_idx_to_disp(stack_idx));
13841384
}
13851385
}
13861386
// Every stack slot is in use. Allocate a new stack slot.
13871387
self.stack_size += 1;
13881388
self.stack_slots.push(Some(vreg_idx));
1389-
Opnd::mem(64, NATIVE_BASE_PTR, self.stack_idx_to_disp(self.stack_slots.len() - 1))
1389+
Opnd::mem(VALUE_BITS, NATIVE_BASE_PTR, self.stack_idx_to_disp(self.stack_slots.len() - 1))
13901390
}
13911391

13921392
/// Deallocate a stack slot for a given disp
@@ -1690,7 +1690,7 @@ impl Assembler
16901690
} else {
16911691
// With FrameSetup, the address that NATIVE_BASE_PTR points to stores an old value in the register.
16921692
// To avoid clobbering it, we need to start from the next slot, hence `+ 1` for the index.
1693-
Opnd::mem(64, NATIVE_BASE_PTR, (idx - ALLOC_REGS.len() + 1) as i32 * -SIZEOF_VALUE_I32)
1693+
Opnd::mem(VALUE_BITS, NATIVE_BASE_PTR, (idx - ALLOC_REGS.len() + 1) as i32 * -SIZEOF_VALUE_I32)
16941694
}
16951695
}
16961696

@@ -1763,8 +1763,8 @@ impl Assembler
17631763
fn set_stack_canary(&mut self) -> Option<Opnd> {
17641764
if cfg!(feature = "runtime_checks") {
17651765
if let Some(stack_size) = self.leaf_ccall_stack_size.take() {
1766-
let canary_addr = self.lea(Opnd::mem(64, SP, (stack_size as i32) * SIZEOF_VALUE_I32));
1767-
let canary_opnd = Opnd::mem(64, canary_addr, 0);
1766+
let canary_addr = self.lea(Opnd::mem(VALUE_BITS, SP, (stack_size as i32) * SIZEOF_VALUE_I32));
1767+
let canary_opnd = Opnd::mem(VALUE_BITS, canary_addr, 0);
17681768
self.mov(canary_opnd, vm_stack_canary().into());
17691769
return Some(canary_opnd)
17701770
}
@@ -2165,22 +2165,22 @@ impl Assembler
21652165
let SideExit { pc, stack, locals } = exit;
21662166

21672167
asm_comment!(asm, "save cfp->pc");
2168-
asm.store(Opnd::mem(64, CFP, RUBY_OFFSET_CFP_PC), *pc);
2168+
asm.store(Opnd::mem(VALUE_BITS, CFP, RUBY_OFFSET_CFP_PC), *pc);
21692169

21702170
asm_comment!(asm, "save cfp->sp");
2171-
asm.lea_into(Opnd::mem(64, CFP, RUBY_OFFSET_CFP_SP), Opnd::mem(64, SP, stack.len() as i32 * SIZEOF_VALUE_I32));
2171+
asm.lea_into(Opnd::mem(VALUE_BITS, CFP, RUBY_OFFSET_CFP_SP), Opnd::mem(VALUE_BITS, SP, stack.len() as i32 * SIZEOF_VALUE_I32));
21722172

21732173
if !stack.is_empty() {
21742174
asm_comment!(asm, "write stack slots: {}", join_opnds(&stack, ", "));
21752175
for (idx, &opnd) in stack.iter().enumerate() {
2176-
asm.store(Opnd::mem(64, SP, idx as i32 * SIZEOF_VALUE_I32), opnd);
2176+
asm.store(Opnd::mem(VALUE_BITS, SP, idx as i32 * SIZEOF_VALUE_I32), opnd);
21772177
}
21782178
}
21792179

21802180
if !locals.is_empty() {
21812181
asm_comment!(asm, "write locals: {}", join_opnds(&locals, ", "));
21822182
for (idx, &opnd) in locals.iter().enumerate() {
2183-
asm.store(Opnd::mem(64, SP, (-local_size_and_idx_to_ep_offset(locals.len(), idx) - 1) * SIZEOF_VALUE_I32), opnd);
2183+
asm.store(Opnd::mem(VALUE_BITS, SP, (-local_size_and_idx_to_ep_offset(locals.len(), idx) - 1) * SIZEOF_VALUE_I32), opnd);
21842184
}
21852185
}
21862186

@@ -3025,7 +3025,7 @@ mod tests {
30253025
#[should_panic]
30263026
fn load_into_memory_is_invalid() {
30273027
let mut asm = Assembler::new();
3028-
let mem = Opnd::mem(64, SP, 0);
3028+
let mem = Opnd::mem(VALUE_BITS, SP, 0);
30293029
asm.load_into(mem, mem);
30303030
}
30313031

@@ -3069,13 +3069,13 @@ mod tests {
30693069
fn test_resolve_parallel_moves_break_memory_memory_cycle() {
30703070
let scratch_reg = scratch_reg();
30713071
let result = Assembler::resolve_parallel_moves(&[
3072-
(Opnd::mem(64, C_ARG_OPNDS[0], 0), C_ARG_OPNDS[1]),
3073-
(C_ARG_OPNDS[1], Opnd::mem(64, C_ARG_OPNDS[0], 0)),
3072+
(Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0), C_ARG_OPNDS[1]),
3073+
(C_ARG_OPNDS[1], Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0)),
30743074
], Some(scratch_reg));
30753075
assert_eq!(result, Some(vec![
30763076
(scratch_reg, C_ARG_OPNDS[1]),
3077-
(C_ARG_OPNDS[1], Opnd::mem(64, C_ARG_OPNDS[0], 0)),
3078-
(Opnd::mem(64, C_ARG_OPNDS[0], 0), scratch_reg),
3077+
(C_ARG_OPNDS[1], Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0)),
3078+
(Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0), scratch_reg),
30793079
]));
30803080
}
30813081

@@ -3084,11 +3084,11 @@ mod tests {
30843084
let scratch_reg = scratch_reg();
30853085
let result = Assembler::resolve_parallel_moves(&[
30863086
(C_ARG_OPNDS[0], C_ARG_OPNDS[1]),
3087-
(C_ARG_OPNDS[1], Opnd::mem(64, C_ARG_OPNDS[0], 0)),
3087+
(C_ARG_OPNDS[1], Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0)),
30883088
], Some(scratch_reg));
30893089
assert_eq!(result, Some(vec![
30903090
(scratch_reg, C_ARG_OPNDS[1]),
3091-
(C_ARG_OPNDS[1], Opnd::mem(64, C_ARG_OPNDS[0], 0)),
3091+
(C_ARG_OPNDS[1], Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0)),
30923092
(C_ARG_OPNDS[0], scratch_reg),
30933093
]));
30943094
}
@@ -3098,10 +3098,10 @@ mod tests {
30983098
let scratch_reg = scratch_reg();
30993099
let result = Assembler::resolve_parallel_moves(&[
31003100
(C_ARG_OPNDS[0], SP),
3101-
(Opnd::mem(64, C_ARG_OPNDS[0], 0), CFP),
3101+
(Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0), CFP),
31023102
], Some(scratch_reg));
31033103
assert_eq!(result, Some(vec![
3104-
(Opnd::mem(64, C_ARG_OPNDS[0], 0), CFP),
3104+
(Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0), CFP),
31053105
(C_ARG_OPNDS[0], SP),
31063106
]));
31073107
}
@@ -3119,8 +3119,8 @@ mod tests {
31193119
#[should_panic]
31203120
fn test_resolve_parallel_moves_into_same_memory() {
31213121
Assembler::resolve_parallel_moves(&[
3122-
(Opnd::mem(64, C_ARG_OPNDS[0], 0), SP),
3123-
(Opnd::mem(64, C_ARG_OPNDS[0], 0), CFP),
3122+
(Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0), SP),
3123+
(Opnd::mem(VALUE_BITS, C_ARG_OPNDS[0], 0), CFP),
31243124
], Some(scratch_reg()));
31253125
}
31263126
}

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