Skip to content

PWRSEQ_LPWKST0 and adjacent registers for GPIO are incorrect in SVD #7

@eggroll-bot

Description

@eggroll-bot

Some bit widths are incorrect, making some of these registers not readable and/or writable.

Metadata

Metadata

Assignees

Labels

bugSomething isn't working

Type

No type

Projects

No projects

Milestone

No milestone

Relationships

None yet

Development

No branches or pull requests

Issue actions