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Changed FMC clock - faster SDRAM, slower EPD clock.
1 parent 0449a2b commit a0f41af

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4 files changed

+33
-17
lines changed

4 files changed

+33
-17
lines changed

src/boards/Inkplate6Motion/IP6MotionDriver.cpp

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -583,6 +583,7 @@ int EPDDriver::epdPSU(uint8_t _state)
583583

584584
// Enable buffer for the control ePaper lines.
585585
EPD_BUF_CLEAR;
586+
pinMode(EPD_BUFF_PIN, OUTPUT);
586587

587588
// Set new PMIC state.
588589
_epdPSUState = 1;
@@ -603,6 +604,7 @@ int EPDDriver::epdPSU(uint8_t _state)
603604

604605
// Disable buffer for the control ePaper lines.
605606
EPD_BUF_SET;
607+
pinMode(EPD_BUFF_PIN, INPUT);
606608

607609
// One second should be long enough to shut down all EPD PMICs voltage rails.
608610
unsigned long timer = millis();
@@ -653,12 +655,20 @@ void EPDDriver::gpioInit()
653655
internalIO.blockPinUsage(5);
654656

655657
// Set EPD buffer enable for ePaper control pins to output.
656-
pinMode(EPD_BUFF_PIN, OUTPUT);
658+
//pinMode(EPD_BUFF_PIN, OUTPUT);
657659

658660
// Enable the external RAM (inverse logic due P-MOS) and enable it by default.
661+
// Since the output is by default low, that will enable the SDRAM for a split
662+
// second, set the output to be set as high first, then set the pin as output.
663+
// Otherwise, SDRAM would glitch.
664+
digitalWrite(PB5, LOW);
665+
pinMode(PB5, OUTPUT);
666+
digitalWrite(INKPLATE_SDRAM_EN, HIGH);
659667
pinMode(INKPLATE_SDRAM_EN, OUTPUT);
660668
digitalWrite(INKPLATE_SDRAM_EN, LOW);
661669

670+
delay(100);
671+
662672
// Disable battery measurement pin
663673
pinMode(INKPLATE_BATT_MEASURE_EN, OUTPUT);
664674
digitalWrite(INKPLATE_BATT_MEASURE_EN, LOW);

src/stm32System/stm32FMC.cpp

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -68,10 +68,10 @@ static void MX_FMC_Init(void)
6868
/* Timing */
6969
_timing.AddressSetupTime = 0;
7070
_timing.AddressHoldTime = 0;
71-
_timing.DataSetupTime = 2;
71+
_timing.DataSetupTime = 4;
7272
_timing.BusTurnAroundDuration = 0;
73-
_timing.CLKDivision = 1;
74-
_timing.DataLatency = 1;
73+
_timing.CLKDivision = 0;
74+
_timing.DataLatency = 0;
7575
_timing.AccessMode = FMC_ACCESS_MODE_A;
7676
/* ExtTiming */
7777

@@ -89,19 +89,19 @@ static void MX_FMC_Init(void)
8989
_hsdram1.Init.RowBitsNumber = FMC_SDRAM_ROW_BITS_NUM_13;
9090
_hsdram1.Init.MemoryDataWidth = FMC_SDRAM_MEM_BUS_WIDTH_16;
9191
_hsdram1.Init.InternalBankNumber = FMC_SDRAM_INTERN_BANKS_NUM_4;
92-
_hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_2;
92+
_hsdram1.Init.CASLatency = FMC_SDRAM_CAS_LATENCY_3;
9393
_hsdram1.Init.WriteProtection = FMC_SDRAM_WRITE_PROTECTION_DISABLE;
9494
_hsdram1.Init.SDClockPeriod = FMC_SDRAM_CLOCK_PERIOD_2;
9595
_hsdram1.Init.ReadBurst = FMC_SDRAM_RBURST_ENABLE;
96-
_hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_0;
96+
_hsdram1.Init.ReadPipeDelay = FMC_SDRAM_RPIPE_DELAY_1;
9797
/* SdramTiming */
9898
_sdramTiming.LoadToActiveDelay = 2;
99-
_sdramTiming.ExitSelfRefreshDelay = 10;
100-
_sdramTiming.SelfRefreshTime = 2;
101-
_sdramTiming.RowCycleDelay = 8;
102-
_sdramTiming.WriteRecoveryTime = 4;
103-
_sdramTiming.RPDelay = 2;
104-
_sdramTiming.RCDDelay = 2;
99+
_sdramTiming.ExitSelfRefreshDelay = 12;
100+
_sdramTiming.SelfRefreshTime = 8;
101+
_sdramTiming.RowCycleDelay = 10;
102+
_sdramTiming.WriteRecoveryTime = 3;
103+
_sdramTiming.RPDelay = 4;
104+
_sdramTiming.RCDDelay = 4;
105105

106106
if (HAL_SDRAM_Init(&_hsdram1, &_sdramTiming) != HAL_OK)
107107
{
@@ -143,7 +143,7 @@ static void MX_FMC_Init(void)
143143
}
144144

145145
/* Step 7: Program the external memory mode register */
146-
_modeRegister = (0 << 0) | (0 << 2) | (2 << 4) | (0 << 7) | (1 << 9);
146+
_modeRegister = 0b000000110011011;
147147
_command.CommandMode = FMC_SDRAM_CMD_LOAD_MODE;
148148
_command.ModeRegisterDefinition = _modeRegister;
149149
_command.CommandTarget = FMC_SDRAM_CMD_TARGET_BANK2;
@@ -153,8 +153,8 @@ static void MX_FMC_Init(void)
153153
/* Step 8: Set the refresh rate counter - refer to section SDRAM refresh timer register in RM0455 */
154154
/* Set the device refresh rate
155155
* COUNT = [(SDRAM self refresh time / number of row) x SDRAM CLK] – 20
156-
= [(64ms/8192) * 133.3333MHz] - 20 = 1021.6667 */
157-
if (HAL_SDRAM_ProgramRefreshRate(&_hsdram1, 1022) != HAL_OK)
156+
= [(64ms/8192) * 143.3333MHz] - 20 = 1099. */
157+
if (HAL_SDRAM_ProgramRefreshRate(&_hsdram1, 1152) != HAL_OK)
158158
{
159159
Error_Handler();
160160
}
@@ -179,7 +179,7 @@ static void HAL_FMC_MspInit(void)
179179
*/
180180
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_FMC;
181181
PeriphClkInitStruct.PLL2.PLL2M = 6;
182-
PeriphClkInitStruct.PLL2.PLL2N = 200;
182+
PeriphClkInitStruct.PLL2.PLL2N = 225;
183183
PeriphClkInitStruct.PLL2.PLL2P = 2;
184184
PeriphClkInitStruct.PLL2.PLL2Q = 2;
185185
PeriphClkInitStruct.PLL2.PLL2R = 2;

src/system/defines.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,7 +14,7 @@
1414
#define __DEFINES_H__
1515

1616
// Uncomment for debug messages.
17-
// #define __INKPLATE__DEBUG__
17+
//#define __INKPLATE__DEBUG__
1818

1919
// Debug meesage print.
2020
#ifdef __INKPLATE__DEBUG__

src/system/epdPmic/epdPmic.cpp

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -37,6 +37,12 @@ bool EpdPmic::begin()
3737
Wire.beginTransmission(TPS_PMIC_ADDR);
3838
int _ret = Wire.endTransmission();
3939

40+
// Disable all rails!
41+
setRails(0);
42+
43+
// Wait a little bit until all rails are discharged.
44+
delay(10);
45+
4046
// If Wire.endTransmission returns anything else than 0 - Success, return false.
4147
return (_ret != 0 ? false : true);
4248
}

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