Implement _getCurrentMillisTimer();

Author: SpenceKonde

ChangeLog.md

@@ -24,6 +24,8 @@ Changes listed here are checked in to GitHub ("master" branch unless specificall
 
 ### Planned 2.6.11
 * Pending: New toolchain version.
+* Make wiring.c have the functions referred to in the doc.
+* Fix some of the constants for timers so that all timers can still get uniform codes specifying the portmux and (for non-TCA's) which pin within the mux it is, which matters forthe other core.
 * Documentation improvements.
 * Corrected bug sometimes encountered when using serial under atypical cases the causes of which remain mysterious), where it would complain about `__poll_dre_done`.
 * Correct bug with Comparator (#1236)

megaavr/cores/megatinycore/Arduino.h

@@ -314,6 +314,7 @@ void initVariant();
 void takeOverTCA0();
 void takeOverTCD0();
 
+uint8_t getCurrentMillisTimer();
 
 
 
@@ -515,7 +516,7 @@ uint32_t microsecondsToMillisClockCycles(uint32_t microseconds);
 #define TIMERB6         (0x26) // TCB6
 #define TIMERB7         (0x27) // TCB7
 #define TIMERD0         (0x40) // If any of these bits match it's potentially on TCD0
-#define DACOUT          (0x80) /// If the high bit is set, it;s either the DAC oone of the new timers.
+#define DACOUT          (0xF8) /// If the high bit is set, it;s either the DAC oone of the new timers.
 #define TIMERE0         (0x10) // I do not expect TCE and TCA to ever coexist on the same chip. TCE comes with WEX and the need for the PLL. Would they put TCA's on a part that had the infrastructre for TCEs? Doubtful
 #define TIMERE1         (0x08)
 #define TIMERF0         (0xA0)
@@ -524,16 +525,17 @@ uint32_t microsecondsToMillisClockCycles(uint32_t microseconds);
  * For the millis timer, there's nothing weird here.
  * But the timer table constants contain more information than that for these. When user code interprets the timer table entries it is critical to do it right:
  *  1. If 0x40 is set, TCD0 can output here. bits 4 and 5 contain information on what channel, and bits 0-2 specify what the PORTMUX must be set to.
- *  2. If 0x20 us set, there is a TCB can output PWM there.
+ *  2. If there's a TCE/TCF, if 0x90 is set, it's TCE0, 0xA0 is TCE1,
+ *  2. If 0x20 is set, there is a TCB can output PWM there.
  *    2a. If 0x20 is set, check 0x10 - if that's set, it's the alt pin mapping. This is currently not returned by the table, and I assess it to be unlikely to be of use
  *  4. If 0x10 is set, it's a TCA0 pin. This is never used in the timer table, but digitalPinToTimerNow() can return it.
  *  5. If 0x08 is set, it's a TCA1 pin. This is never used in the timer table, but digitalPinToTimerNow() can return it.
  * Ergo, use bitwise ands
  */
 
-#define TIMERRTC        (0x90) // RTC with internal osc
-#define TIMERRTC_XTAL   (0x91) // RTC with crystal
-#define TIMERRTC_CLK    (0x92) // RTC with ext clock
+#define TIMERRTC        (0xF0) // RTC with internal osc
+#define TIMERRTC_XTAL   (0xF1) // RTC with crystal
+#define TIMERRTC_CLK    (0xF2) // RTC with ext clock
 
 #if !defined(MEGATINYCORE)
   /* Not used in table */
@@ -608,16 +610,24 @@ uint32_t microsecondsToMillisClockCycles(uint32_t microseconds);
   #define TIMERD0_7WOB      (0x57) // hypothetical TCD0 WOB ALT7
   #define TIMERD0_7WOC      (0x67) // hypothetical TCD0 WOC ALT7
   #define TIMERD0_7WOD      (0x77) // hypothetical TCD0 WOD ALT7
-
-
-  #define TIMERE0_MUX0      (0x90) // TCE/WEX mux
-  #define TIMERE0_MUX1      (0x91) // TCE/WEX mux
-  #define TIMERE0_MUX2      (0x92) // TCE/WEX mux
-  #define TIMERE0_MUX3      (0x93) // TCE/WEX mux
-  #define TIMERE0_MUX4      (0x94) // TCE/WEX mux
-  #define TIMERE0_MUX5      (0x95) // TCE/WEX mux
-  #define TIMERE0_MUX6      (0x96) // Hypothetical TCE/WEX mux
-  #define TIMERE0_MUX7      (0x97) // Hypothetical TCE/WEX mux
+  /* 0x01xx 1xxx for potential futyre TCD1 */
+
+  #define TIMERE0_MUX0      (0x90) // TCE/WEX mux PORTA
+  #define TIMERE0_MUX1      (0x91) // TCE/WEX mux PORTB (TBA)
+  #define TIMERE0_MUX2      (0x92) // TCE/WEX mux PORTC
+  #define TIMERE0_MUX3      (0x93) // TCE/WEX mux PORTD
+  #define TIMERE0_MUX4      (0x94) // TCE/WEX mux PORTE
+  #define TIMERE0_MUX5      (0x95) // TCE/WEX mux PORTF
+  #define TIMERE0_MUX6      (0x96) // TCE/WEX mux PORTG (TBA)
+  #define TIMERE0_MUX7      (0x97) // TCE/WEX mux (TBA)
+  #define TIMERE0_MUX8      (0x98) // TCE/WEX mux PORTA2
+  #define TIMERE0_MUX9      (0x99) // TCE/WEX mux PORTC2
+  #define TIMERE0_MUX10     (0x9A) // TCE/WEX mux
+  #define TIMERE0_MUX11     (0x9B) // TCE/WEX mux
+  #define TIMERE0_MUX12     (0x9C) // TCE/WEX mux
+  #define TIMERE0_MUX13     (0x9D) // TCE/WEX mux
+  #define TIMERE0_MUX14     (0x9E) // TCE/WEX mux
+  #define TIMERE0_MUX15     (0x9F) // TCE/WEX mux
   /*
   // They might make a chip with 2 of them!
   #define TIMERE1_MUX0      (0xA0) // Hypothetical TCE/WEX mux
@@ -683,6 +693,13 @@ uint32_t microsecondsToMillisClockCycles(uint32_t microseconds);
   */
 
 #endif
+
+#define MILLIS_RUNNING      (0x00)
+#define MILLIS_PAUSED       (0x01)
+#define MILLIS_ON_ALT_TIMER (0x02)
+
+
+
 __attribute__ ((noinline)) void _delayMicroseconds(unsigned int us);
 
 

megaavr/cores/megatinycore/wiring.c

@@ -47,6 +47,8 @@ void init_timers();
  */
 uint8_t __PeripheralControl = 0xFF;
 
+uint8_t __MillisState = 0xFF;
+
 // the prescaler is set so that timer ticks every 64 clock cycles, and the
 // the overflow handler is called every 256 ticks.
 
@@ -1327,6 +1329,7 @@ void stop_millis()
     #else
       _timer->INTCTRL &= ~TCB_CAPT_bm;
     #endif
+      __MillisState == 0x01;
   #endif
 }
 
@@ -1369,10 +1372,21 @@ void restart_millis()
 }
 
 
+uint8_t getCurrentMillisTimer() {
+  #if defined(MILLIS_USE_TIMERNONE)
+    return NOT_ON_TIMER;
+  #elif !defined(MILLIS_TIMER)
+    badCall("Can't happen! Millis defines busted");
+  #else
+    if (!__MillisState) {
+      return MILLIS_TIMER;
+    } else {
+      return __MillisState;
+    }
+  #endif
+}
 
-
-void __attribute__((weak)) init_millis()
-{
+void __attribute__((weak)) init_millis() {
   #if defined(MILLIS_USE_TIMERNONE)
     badCall("init_millis() is only valid with millis time keeping enabled.");
   #else
@@ -1393,8 +1407,7 @@ void __attribute__((weak)) init_millis()
       pTCD->INTCTRL        = 0x01; // enable interrupt
       pTCD->CTRLA          = TIMERD0_PRESCALER | 0x01; // set clock source and enable!
     #elif defined(MILLIS_USE_TIMERRTC)
-      while(RTC.STATUS); // if RTC is currently busy, spin until it's not.
-      // to do: add support for RTC timer initialization
+      while(RTC.STATUS);
       RTC.PER             = 0xFFFF;
       #ifdef MILLIS_USE_TIMERRTC_XTAL
         _PROTECTED_WRITE(CLKCTRL.XOSC32KCTRLA,0x03);
@@ -1414,11 +1427,11 @@ void __attribute__((weak)) init_millis()
       // CLK_PER/1 is 0b00, . CLK_PER/2 is 0b01, so bitwise OR of valid divider with enable works
       _timer->CTRLA = TIME_TRACKING_TIMER_DIVIDER|TCB_ENABLE_bm;  // Keep this last before enabling interrupts to ensure tracking as accurate as possible
     #endif
+    __MillisState == 0x00;
   #endif
 }
 
-void set_millis(__attribute__((unused))uint32_t newmillis)
-{
+void set_millis(__attribute__((unused))uint32_t newmillis) {
   #if defined(MILLIS_USE_TIMERNONE)
     badCall("set_millis() is only valid with millis timekeeping enabled.");
     (void)newmillis; // unused parameter
@@ -1663,7 +1676,9 @@ void __attribute__((weak)) init_ADC0() {
     /* Default low latency mode on
      * Users can turn it off if they care about power consumption while ADC is on
      * and chip is awake, since these parts don't have the perverse ADC-left-on
-     * behavior of classic AVRs. */
+     * behavior of classic AVRs.
+     * ... Yes they do afterall. Fudge. Fixed on Ex though.
+     */
     pADC->CTRLC = TIMEBASE_1US; // defined in Arduino.h.
     pADC->PGACTRL = ADC_PGABIASSEL_3_4X_gc | ADC_ADCPGASAMPDUR_15CLK_gc;
     /* Note that we don't *enable* it automatically in init().

megaavr/extras/CompileTestSketches/timing/test_millis_micros/test_millis_micros.ino

@@ -12,9 +12,12 @@
 void setup() {
   /* test manipulation functions */
   #ifndef MILLIS_USE_TIMERNONE
+    GPIOR0 = _getCurrentMillisTimer();
     stop_millis();
+    GPIOR0 = _getCurrentMillisTimer();
     set_millis(_SFR_MEM32(0x001C));
     restart_millis();
+    GPIOR0 = _getCurrentMillisTimer();
   #endif
 }
 void loop() {

megaavr/extras/Ref_Defines.md

@@ -60,9 +60,10 @@ if (MILLIS_TIMER & 0x40) {
 } else if (MILLIS_TIMER & 0x80) {
   //RTC
 }
+```
 
+Note also the existence of the run-time function,
 
-```
 ### Timer identifier interpretation (digitalPinToTimer() return values)
 These are 8-bit values. They are fully enumerated and much more detail provided near the end of this document.
 

megaavr/extras/Ref_Interrupts.md

@@ -356,6 +356,7 @@ ISR(PERIPHERAL_INT_vect, ISR_NAKED)
 
 
 ## Appendix: Vector Index for tinyAVR
+For debugging - "Duplicate of vector 25?! the hell one is that?!"
 
 | Vector Name       | T2 | 16k+ | 2-8k |
 |-------------------|----|------|------|
@@ -399,3 +400,7 @@ ISR(PERIPHERAL_INT_vect, ISR_NAKED)
 | USART1_RXC_vect   | 27 |    . |    . |
 | USART1_TXC_vect   | 28 |    . |    . |
 | NVMCTRL_EE_vect   | 29 |   30 |   25 |
+
+## Why do the few pieces of documentation mentioning this speak as though it were impossible to give better compile errors?
+
+This is a bit of a puzzler. It appears that the names are "set in stone" when the C runtimes are precompiled. Which is only done for instruction set variants, and so doesn't have the names of the vectors; further, it sounds as though there's no way to get the linker to give better errors. It definitely seems that there is a communictions bottleneck between everything else, and the linker.

megaavr/extras/Ref_Robust.md

@@ -16,7 +16,7 @@ BOD will keep the chip in reset when you it knows the voltage is too low to keep
 ### If you don't use BOD
 You need to ask yourself a few hard questions:
 * ~if~ When the system is hung in production, how hard/embarrassing will it be to have to run to reset them by hand?
-* If it's hard to reset the device (mounted on a 20 meter pole, in the canopy of a tree, in a drainage ditch six feet up, or worst of all, mounted on a 20 meter pole attached to the canopy of a tree growing our of a drainage ditch located at a customer site.), use the watchdog timer!
+* If it's hard to reset the device (mounted on a 20 meter pole, in the canopy of a tree, in a drainage ditch six feet up, or worst of all, mounted on a 20 meter pole attached to the canopy of a tree growing out of a drainage ditch located at a customer site.), use the watchdog timer!
 * Running a simple program at 20 MHz, lowering voltage until output ceases, and then restoring voltage does NOT reliably restore execution without BOD!
 
 ### A bootloader is likely the right approach if you want end users to be uploading updates

megaavr/libraries/Logic/Tricks_and_Tips.md

@@ -169,25 +169,25 @@ Propagation time (Tp) is in ns, and has been rounded to quarter-nanoseconds to d
 Current was also measured using a bench power supply. As the power supply in quetion is known to be of low quality (typical low cost chinese import bench supply). It was deemed sufficiently accurate for this purpose, though its readings were sometimes not reproducible, leading to uncertainty about whether the discrepancy was within the microcontroller or elsewheremember, this is a sample size of 1 tested under conditions governed by expediency, not precision. I did, however, set the cpu speed to 1 MHz to reach lower voltages and to make the control numbers more useful
 
 
-| Vdd   | F(case1) | F(case2) | Tp CCL   | Tp EVSYS | I (case1) | I (case2) | I(control) |Notes |
-|-------|----------|----------|---------------------|-----------|-----------|------------|----|
-| 5.2   | 84.x MHz | 49 MHz   |  6.0     |  4.25    |    n/t    |    n/t    |     n/t    | (VUSB, current unmetered) |
-| 5.0   | 83.x MHz | 48 MHz   |  6.0     |  4.50    |     17 mA |      6 mA |       0    | . |
-| 4.5   | 78 MHz   | 44 MHz   |  6.5     |  5.0     |     12 mA |      6    |       0    | . |
-| 4.0   | 71 MHz   | 40 MHz   |  7.0     |  5.5     |    7.5 mA |      6    |       0    | . |
-| 3.5   | 63 MHz   | 36 MHz   |  8.0     |  6.0     |      6 mA |      6    |       0    | . |
-| 3.3   | 59 MHz   | 34 MHz   |  8.5     |  6.25    |      6 mA |      5    |       0    | . |
-| 3.3   | 59 MHz   |  n/t     |  8.5     |  n/t     |     n/t   |     n/t   |      n/t   | (From 3.3v regulator (LDL1117), current unmetered) |
-| 3.0   | 53 MHz   | 30.5 MHz |  9.5     |  7.0     |      6 mA |      3    |       0    | . |
-| 2.5   | 42 MHz   | 24.1 MHz | 12.0     |  8.75    |      4 mA |      0    |       0    | At 20 Mhz, 2.4V no longer works.Raising voltage again does not fix it, power cycle needed. That is not surprising |
-| 2.0   | 29 MHz   | 16.6 MHz | 17.25    |  13.0    |      0 mA |      0    |       0    | Current readings obviously of |
-| 1.9   | 26.0 MHz | 15.0 MHz | 19.25    |  14.0    |      0 mA |      0    |       0    | little value below here. But |
-| 1.8   | 23.4 MHz | 13.4 MHz | 21.5     |  16.0    |      0 mA |      0    |       0    | This is the minimum rated voltage for these parts, and the lowest BOD voltage |
-| 1.7   | 20.5 MHz | 11.8 MHz | 24.5     |  18.0    |      0 mA |      0    |       0    | . |
-| 1.6   | 17.8 MHz | 10.1 MHz | 28.0     |  21.5    |      0 mA |      0    |       0    | . |
-| 1.5   | 15.1 MHz |  8.6 MHz | 33.0     |  25.0    |      0 mA |      0    |       0    | . |
-| 1.4   | 12.3 MHz |  7.1 MHz | 40.75    |  29.75   |      0 mA |      0    |       0    | At least the CCL kept at it down to 1.4v, before hitting the power on reset threshold at 1.3V |
-| 1.3   | 0 MHz    | 0 MHz    | n/a      | n/a      |      0 mA |      0 mA |       0 mA | Chip below POR threshold |
+| Vdd   | F(case1) | F(case2) | Tp CCL   | Tp EVSYS | I (case1) | I (case2) | I(control) |Notes
+|-------|----------|----------|----------|----------|-----------|-----------|------------|----
+| 5.2   | 84.x MHz | 49 MHz   |  6.0     |  4.25    |    n/t    |    n/t    |     n/t    | (VUSB, current unmetered)
+| 5.0   | 83.x MHz | 48 MHz   |  6.0     |  4.50    |     17 mA |      6 mA |       0    | .
+| 4.5   | 78 MHz   | 44 MHz   |  6.5     |  5.0     |     12 mA |      6    |       0    | .
+| 4.0   | 71 MHz   | 40 MHz   |  7.0     |  5.5     |    7.5 mA |      6    |       0    | .
+| 3.5   | 63 MHz   | 36 MHz   |  8.0     |  6.0     |      6 mA |      6    |       0    | .
+| 3.3   | 59 MHz   | 34 MHz   |  8.5     |  6.25    |      6 mA |      5    |       0    | .
+| 3.3   | 59 MHz   |  n/t     |  8.5     |  n/t     |     n/t   |     n/t   |      n/t   | (From 3.3v regulator (LDL1117), current unmetered)
+| 3.0   | 53 MHz   | 30.5 MHz |  9.5     |  7.0     |      6 mA |      3    |       0    | .
+| 2.5   | 42 MHz   | 24.1 MHz | 12.0     |  8.75    |      4 mA |      0    |       0    | At 20 Mhz, 2.4V no longer works.Raising voltage again does not fix it, power cycle needed. That is not surprising
+| 2.0   | 29 MHz   | 16.6 MHz | 17.25    |  13.0    |      0 mA |      0    |       0    | Current readings obviously of
+| 1.9   | 26.0 MHz | 15.0 MHz | 19.25    |  14.0    |      0 mA |      0    |       0    | little value below here. But
+| 1.8   | 23.4 MHz | 13.4 MHz | 21.5     |  16.0    |      0 mA |      0    |       0    | This is the minimum rated voltage for these parts, and the lowest BOD voltage
+| 1.7   | 20.5 MHz | 11.8 MHz | 24.5     |  18.0    |      0 mA |      0    |       0    | .
+| 1.6   | 17.8 MHz | 10.1 MHz | 28.0     |  21.5    |      0 mA |      0    |       0    | .
+| 1.5   | 15.1 MHz |  8.6 MHz | 33.0     |  25.0    |      0 mA |      0    |       0    | .
+| 1.4   | 12.3 MHz |  7.1 MHz | 40.75    |  29.75   |      0 mA |      0    |       0    | At least the CCL kept at it down to 1.4v, before hitting the power on reset threshold at 1.3V
+| 1.3   | 0 MHz    | 0 MHz    | n/a      | n/a      |      0 mA |      0 mA |       0 mA | Chip below POR threshold
 
 
 Conclusions: