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Update wiring.c
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megaavr/cores/megatinycore/wiring.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1329,7 +1329,7 @@ void stop_millis()
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#else
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_timer->INTCTRL &= ~TCB_CAPT_bm;
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#endif
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__MillisState == 0x01;
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__MillisState = 0x01;
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#endif
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}
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@@ -1427,7 +1427,7 @@ void __attribute__((weak)) init_millis() {
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// CLK_PER/1 is 0b00, . CLK_PER/2 is 0b01, so bitwise OR of valid divider with enable works
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_timer->CTRLA = TIME_TRACKING_TIMER_DIVIDER|TCB_ENABLE_bm; // Keep this last before enabling interrupts to ensure tracking as accurate as possible
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#endif
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__MillisState == 0x00;
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__MillisState = 0x00;
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#endif
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}
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