Report right fault address for shadow MMU

Signed-off-by: Inochi Amaoto <inochiama@gmail.com>

Author: inochisa

src/main/scala/vexiiriscv/memory/MmuPlugin.scala

@@ -437,15 +437,15 @@ class MmuPlugin(var spec : MmuSpec,
       IDLE whenIsActive {
         when(arbiter.io.output.valid) {
           val ppn = priv.implementHypervisor.mux(
-            Mux(arbiter.io.output.guest, vsatp.ppn, satp.ppn),
+            Mux(arbiter.io.output.indirect, vsatp.ppn, satp.ppn),
             satp.ppn
           )
           portOhReg := arbiter.io.chosenOH
           storageOhReg := UIntToOh(arbiter.io.output.storageId)
           storageEnable := arbiter.io.output.storageEnable
           virtual := arbiter.io.output.address
           load.address := (ppn @@ spec.levels.last.vpn(arbiter.io.output.address) @@ U(0, log2Up(spec.entryBytes) bits)).resized
-          isTwoStage := arbiter.io.output.guest
+          isTwoStage := arbiter.io.output.indirect
           arbiter.io.output.ready := True
           goto(CMD(spec.levels.size - 1))
         }

src/main/scala/vexiiriscv/memory/Service.scala

@@ -25,7 +25,16 @@ case class AddressTranslationRefillCmdPerm() extends Bundle{
 
 case class AddressTranslationRefillCmd(storageWidth : Int) extends Bundle{
   val address = MIXED_ADDRESS()
-  val guest = Bool()
+  /*
+   * For first-stage MMU:
+   *    false : this request is a one-stage translation.
+   *    true  : this request is a two-stage translation.
+   *
+   * For shadow (second-stage) MMU
+   *    false : this request is for explicit memory access.
+   *    true  : this request is for implicit memory access.
+   */
+  val indirect = Bool()
   val storageId = UInt(storageWidth bits)
   val storageEnable = Bool()
 

src/main/scala/vexiiriscv/memory/ShadowMmuPlugin.scala

@@ -195,6 +195,7 @@ class ShadowMmuPlugin(var spec : MmuSpec,
       val storageOhReg = Reg(Bits(storages.size bits))
       val storageEnable = Reg(Bool())
       val permission = Reg(cloneOf(arbiter.io.output.permission))
+      val isImplicitAccess = Reg(Bool())
 
       arbiter.io.output.ready := False
       IDLE whenIsActive {
@@ -205,6 +206,7 @@ class ShadowMmuPlugin(var spec : MmuSpec,
           virtual := arbiter.io.output.address
           permission := arbiter.io.output.permission
           load.address := (hgatp.ppn @@ spec.levels.last.vpn(arbiter.io.output.address) @@ U(0, log2Up(spec.entryBytes) bits)).resized
+          isImplicitAccess := arbiter.io.output.indirect
           arbiter.io.output.ready := True
 
           when(hgatp.mode === spec.satpMode) {
@@ -405,8 +407,11 @@ class ShadowMmuPlugin(var spec : MmuSpec,
             o.ae_ptw      := accessFault && !load.leaf
             o.ae_final    := accessFault && load.leaf //Note so sure
             o.level       := spec.levels.size - 1 - levelId
-            o.address     := Mux(translationFault, load.address,
-                                  Mux(permissionFault, virtual, translatedAddress).resized)
+            o.address     := Mux(isImplicitAccess,
+              Mux(translationFault, load.address,
+                  Mux(permissionFault, virtual, translatedAddress).resized),
+              virtual
+            ).resized
           }
         }
       }

src/main/scala/vexiiriscv/memory/TranslatedDBusAccessPlugin.scala

@@ -30,6 +30,7 @@ class TranslatedDBusAccessPlugin() extends FiberPlugin with TranslatedDBusAccess
     if (withAtsRedo) {
       atsPort.cmd.valid               := False
       atsPort.cmd.address             := U(0)
+      atsPort.cmd.indirect            := True
       atsPort.cmd.storageEnable       := False
       atsPort.cmd.storageId           := U(0)
       atsPort.cmd.permission.read     := True

src/main/scala/vexiiriscv/misc/TrapPlugin.scala

@@ -422,7 +422,7 @@ class TrapPlugin(val trapAt : Int) extends FiberPlugin with TrapService {
             val refill = ats.newRefillPort()
             val isGuestRefill = pending.state.arg(2) || PrivilegeMode.isGuest(priv.getPrivilege(hartId))
             refill.cmd.valid := False
-            refill.cmd.guest := isGuestRefill
+            refill.cmd.indirect := isGuestRefill
             refill.cmd.permission.read := !pending.state.arg(1)
             refill.cmd.permission.write := pending.state.arg(0, 2 bits) === TrapArg.STORE
             refill.cmd.permission.execute := pending.state.arg(1)
@@ -443,7 +443,7 @@ class TrapPlugin(val trapAt : Int) extends FiberPlugin with TrapService {
           val satsPorts = sats.mayNeedRedo generate new Area{
             val refill = sats.newRefillPort()
             refill.cmd.valid := False
-            refill.cmd.guest := True
+            refill.cmd.indirect := False
             refill.cmd.permission.read := !pending.state.arg(1)
             refill.cmd.permission.write := pending.state.arg(0, 2 bits) === TrapArg.STORE
             refill.cmd.permission.execute := pending.state.arg(1)