@@ -256,7 +256,6 @@ public class SxROM : NES.NESBoardBase
256256
257257 //for snrom wram disable
258258 public bool _is_snrom ;
259- public bool wram_enable = true ;
260259 public bool chr_wram_enable = true ;
261260
262261 //state
@@ -279,18 +278,6 @@ public override void WritePRG(int addr, byte value)
279278 mmc1 . Write ( addr , value ) ;
280279 if ( ! disablemirror )
281280 SetMirrorType ( mmc1 . mirror ) ; //often redundant, but gets the job done
282-
283- if ( _is_snrom )
284- {
285- if ( addr > 0x2000 && addr < 0x6000 )
286- {
287-
288- if ( ( value & 0x10 ) == 0 )
289- wram_enable = true ;
290- else
291- wram_enable = false ;
292- }
293- }
294281 }
295282
296283
@@ -300,7 +287,7 @@ public override byte ReadWRAM(int addr)
300287 {
301288 if ( _is_snrom )
302289 {
303- if ( wram_enable && ! mmc1 . wram_disable && chr_wram_enable )
290+ if ( ! mmc1 . wram_disable && chr_wram_enable )
304291 return base . ReadWRAM ( addr ) ;
305292 else
306293 return NES . DB ;
@@ -327,17 +314,24 @@ int Gen_CHR_Address(int addr)
327314
328315 public override byte ReadPPU ( int addr )
329316 {
317+
318+
330319 if ( addr < 0x2000 )
331320 {
332- // WRAM enable is tied to ppu a12
333- if ( addr . Bit ( 12 ) )
334- chr_wram_enable = false ;
335- else
336- chr_wram_enable = true ;
321+ if ( _is_snrom )
322+ {
323+ // WRAM enable is tied to ppu a12
324+ if ( Gen_CHR_Address ( addr ) . Bit ( 16 ) )
325+ chr_wram_enable = false ;
326+ else
327+ chr_wram_enable = true ;
328+ }
329+
330+ addr = Gen_CHR_Address ( addr ) ;
337331
338332 if ( Cart . vram_size != 0 )
339- return VRAM [ Gen_CHR_Address ( addr ) & vram_mask ] ;
340- else return VROM [ Gen_CHR_Address ( addr ) ] ;
333+ return VRAM [ addr & vram_mask ] ;
334+ else return VROM [ addr ] ;
341335 }
342336 else
343337 {
@@ -355,11 +349,13 @@ public override byte ReadPPU(int addr)
355349 }
356350 else
357351 return base . ReadPPU ( addr ) ;
352+
358353 }
359- }
354+ }
360355
361356 public override void WritePPU ( int addr , byte value )
362357 {
358+
363359
364360 if ( NES . _isVS )
365361 {
@@ -383,11 +379,14 @@ public override void WritePPU(int addr, byte value)
383379 }
384380 else if ( addr < 0x2000 )
385381 {
386- // WRAM enable is tied to ppu a12
387- if ( addr . Bit ( 12 ) )
388- chr_wram_enable = false ;
389- else
390- chr_wram_enable = true ;
382+ if ( _is_snrom )
383+ {
384+ // WRAM enable is tied to ppu a12
385+ if ( Gen_CHR_Address ( addr ) . Bit ( 16 ) )
386+ chr_wram_enable = false ;
387+ else
388+ chr_wram_enable = true ;
389+ }
391390
392391 if ( Cart . vram_size != 0 )
393392 VRAM [ Gen_CHR_Address ( addr ) & vram_mask ] = value ;
@@ -400,7 +399,6 @@ public override void SyncState(Serializer ser)
400399 base . SyncState ( ser ) ;
401400 mmc1 . SyncState ( ser ) ;
402401 ser . Sync ( "ppuclock" , ref ppuclock ) ;
403- ser . Sync ( "wram enable" , ref wram_enable ) ;
404402 ser . Sync ( "chr wram enable" , ref chr_wram_enable ) ;
405403 if ( NES . _isVS )
406404 ser . Sync ( "VS_CIRAM" , ref CIRAM_VS , false ) ;
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