Create q.v

Tan12d · web-flow · commit d1f68254d369 · 2023-07-15T01:46:21.000+05:30
diff --git a/LAB VII: CONSTRUCT, TEST AND INVESTIGATE THE OPERATION OF VARIOUS FLIP-FLOP CIRCUITS USING HDL/Q3/q.v b/LAB VII: CONSTRUCT, TEST AND INVESTIGATE THE OPERATION OF VARIOUS FLIP-FLOP CIRCUITS USING HDL/Q3/q.v
@@ -0,0 +1,11 @@
+// Q3. Design and test JK flip-flop.
+
+
+// design.sv
+
+// Data-Flow
+module circuit3(J, K, Q, T);
+  input    J, K, Q;
+  output   T;
+  assign   T = ((!(Q)) && J) || (Q && (!(K)));
+endmodule
