Create q.v

Tan12d · web-flow · commit e3385fbdab7f · 2023-07-15T01:32:02.000+05:30
diff --git a/LAB VII: CONSTRUCT, TEST AND INVESTIGATE THE OPERATION OF VARIOUS FLIP-FLOP CIRCUITS USING HDL/Q1/q.v b/LAB VII: CONSTRUCT, TEST AND INVESTIGATE THE OPERATION OF VARIOUS FLIP-FLOP CIRCUITS USING HDL/Q1/q.v
@@ -0,0 +1,14 @@
+// Q1. Design and test SR latch.
+
+
+// design.sv
+
+// Data-Flow
+
+module circuit1(S, R, Q, T);
+  input     S, R;
+  output    Q, T;
+  nand      G1(Q, S, T);
+  nand      G2(T, R, Q);
+endmodule
+  
