22// RUN: FileCheck --check-prefix=CIR --input-file=%t.cir %s
33// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -mconstructor-aliases -fclangir -emit-llvm -fno-clangir-call-conv-lowering %s -o %t.ll
44// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s
5- // XFAIL: *
65
76class Mother {
87public:
@@ -40,22 +39,23 @@ int main() {
4039// CIR: !rec_Child = !cir.record<class "Child" {!rec_Mother, !rec_Father} #cir.record.decl.ast>
4140
4241// CIR: cir.func linkonce_odr @_ZN6MotherC2Ev(%arg0: !cir.ptr<!rec_Mother>
43- // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV6Mother, vtable_index = 0, address_point_index = 2) : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>
42+ // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV6Mother, address_point = <index = 0, offset = 2> ) : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>
4443// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr<!rec_Mother>), !cir.ptr<!cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>>
4544// CIR: cir.store %2, %{{[0-9]+}} : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>, !cir.ptr<!cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>>
4645// CIR: cir.return
4746// CIR: }
4847
48+ // Note: GEP emitted by cir might not be the same as LLVM, due to constant folding.
4949// LLVM-DAG: define linkonce_odr void @_ZN6MotherC2Ev(ptr %0)
50- // LLVM-DAG: store ptr getelementptr inbounds ({ [4 x ptr] } , ptr @_ZTV6Mother, i32 0, i32 0, i32 2 ), ptr %{{[0-9]+}}, align 8
50+ // LLVM-DAG: store ptr getelementptr inbounds nuw (i8 , ptr @_ZTV6Mother, i64 16 ), ptr %{{[0-9]+}}, align 8
5151// LLVM-DAG: ret void
5252// LLVM-DAG: }
5353
5454// CIR: cir.func linkonce_odr @_ZN5ChildC2Ev(%arg0: !cir.ptr<!rec_Child>
55- // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, vtable_index = 0, address_point_index = 2) : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>
55+ // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, address_point = <index = 0, offset = 2> ) : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>
5656// CIR: %{{[0-9]+}} = cir.cast(bitcast, %{{[0-9]+}} : !cir.ptr<!rec_Child>), !cir.ptr<!cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>>
5757// CIR: cir.store %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>, !cir.ptr<!cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>>
58- // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, vtable_index = 1, address_point_index = 2) : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>
58+ // CIR: %{{[0-9]+}} = cir.vtable.address_point(@_ZTV5Child, address_point = <index = 1, offset = 2> ) : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>
5959// CIR: %7 = cir.base_class_addr(%1 : !cir.ptr<!rec_Child> nonnull) [8] -> !cir.ptr<!rec_Father>
6060// CIR: %8 = cir.cast(bitcast, %7 : !cir.ptr<!rec_Father>), !cir.ptr<!cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>> loc(#loc8)
6161// CIR: cir.store %{{[0-9]+}}, %{{[0-9]+}} : !cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>, !cir.ptr<!cir.ptr<!cir.ptr<!cir.func<() -> !u32i>>>>
@@ -66,18 +66,19 @@ int main() {
6666// LLVM-DAG: $_ZTS5Child = comdat any
6767// LLVM-DAG: $_ZTS6Father = comdat any
6868
69+ // Note: GEP emitted by cir might not be the same as LLVM, due to constant folding.
6970// LLVM-DAG: define linkonce_odr void @_ZN5ChildC2Ev(ptr %0)
70- // LLVM-DAG: store ptr getelementptr inbounds ({ [4 x ptr], [3 x ptr] }, ptr @_ZTV5Child, i32 0, i32 0, i32 2 ), ptr %{{[0-9]+}}, align 8
71+ // LLVM-DAG: store ptr getelementptr inbounds nuw (i8, ptr @_ZTV5Child, i64 16 ), ptr %{{[0-9]+}}, align 8
7172// LLVM-DAG: %{{[0-9]+}} = getelementptr i8, ptr {{.*}}, i32 8
72- // LLVM-DAG: store ptr getelementptr inbounds ({ [4 x ptr], [3 x ptr] }, ptr @_ZTV5Child, i32 0, i32 1, i32 2 ), ptr %{{[0-9]+}}, align 8
73+ // LLVM-DAG: store ptr getelementptr inbounds nuw (i8, ptr @_ZTV5Child, i64 48 ), ptr %{{[0-9]+}}, align 8
7374// LLVM-DAG: ret void
7475// }
7576
7677// CIR: cir.func @main() -> !s32i extra(#fn_attr) {
7778
78- // CIR: %{{[0-9]+}} = cir.vtable.address_point( %{{[0-9]+}} : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Mother>)>>>, vtable_index = 0, address_point_index = 0) : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Mother>)>>>
79+ // CIR: %{{[0-9]+}} = cir.vtable.address_point( %{{[0-9]+}} : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Mother>)>>>, address_point = <index = 0, offset = 0> ) : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Mother>)>>>
7980
80- // CIR: %{{[0-9]+}} = cir.vtable.address_point( %{{[0-9]+}} : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Child>)>>>, vtable_index = 0, address_point_index = 0) : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Child>)>>>
81+ // CIR: %{{[0-9]+}} = cir.vtable.address_point( %{{[0-9]+}} : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Child>)>>>, address_point = <index = 0, offset = 0> ) : !cir.ptr<!cir.ptr<!cir.func<(!cir.ptr<!rec_Child>)>>>
8182
8283// CIR: }
8384
@@ -94,8 +95,9 @@ int main() {
9495// LLVM-DAG: @_ZTS6Mother = linkonce_odr global [7 x i8] c"6Mother", comdat
9596
9697// typeinfo for Mother
98+ // Note: GEP emitted by cir might not be the same as LLVM, due to constant folding.
9799// CIR: cir.global constant external @_ZTI6Mother = #cir.typeinfo<{#cir.global_view<@_ZTVN10__cxxabiv117__class_type_infoE, [2 : i32]> : !cir.ptr<!u8i>, #cir.global_view<@_ZTS6Mother> : !cir.ptr<!u8i>}> : ![[VTypeInfoA]] {alignment = 8 : i64}
98- // LLVM-DAG: @_ZTI6Mother = constant { ptr, ptr } { ptr getelementptr inbounds (ptr , ptr @_ZTVN10__cxxabiv117__class_type_infoE, i32 2 ), ptr @_ZTS6Mother }
100+ // LLVM-DAG: @_ZTI6Mother = constant { ptr, ptr } { ptr getelementptr inbounds nuw (i8 , ptr @_ZTVN10__cxxabiv117__class_type_infoE, i64 16 ), ptr @_ZTS6Mother }
99101
100102// vtable for Father
101103// CIR: cir.global linkonce_odr @_ZTV6Father = #cir.vtable<{#cir.const_array<[#cir.ptr<null> : !cir.ptr<!u8i>, #cir.global_view<@_ZTI6Father> : !cir.ptr<!u8i>, #cir.global_view<@_ZN6Father9FatherFooEv> : !cir.ptr<!u8i>]> : !cir.array<!cir.ptr<!u8i> x 3>}> : ![[VTableTypeFather]] {alignment = 8 : i64}
@@ -118,9 +120,11 @@ int main() {
118120// LLVM-DAG: @_ZTS6Father = linkonce_odr global [7 x i8] c"6Father", comdat
119121
120122// typeinfo for Father
123+ // Note: GEP emitted by cir might not be the same as LLVM, due to constant folding.
121124// CIR: cir.global constant external @_ZTI6Father = #cir.typeinfo<{#cir.global_view<@_ZTVN10__cxxabiv117__class_type_infoE, [2 : i32]> : !cir.ptr<!u8i>, #cir.global_view<@_ZTS6Father> : !cir.ptr<!u8i>}> : !rec_anon_struct {alignment = 8 : i64}
122- // LLVM-DAG: @_ZTI6Father = constant { ptr, ptr } { ptr getelementptr inbounds (ptr , ptr @_ZTVN10__cxxabiv117__class_type_infoE, i32 2 ), ptr @_ZTS6Father }
125+ // LLVM-DAG: @_ZTI6Father = constant { ptr, ptr } { ptr getelementptr inbounds nuw (i8 , ptr @_ZTVN10__cxxabiv117__class_type_infoE, i64 16 ), ptr @_ZTS6Father }
123126
124127// typeinfo for Child
128+ // Note: GEP emitted by cir might not be the same as LLVM, due to constant folding.
125129// CIR: cir.global constant external @_ZTI5Child = #cir.typeinfo<{#cir.global_view<@_ZTVN10__cxxabiv121__vmi_class_type_infoE, [2 : i32]> : !cir.ptr<!u8i>, #cir.global_view<@_ZTS5Child> : !cir.ptr<!u8i>, #cir.int<0> : !u32i, #cir.int<2> : !u32i, #cir.global_view<@_ZTI6Mother> : !cir.ptr<!u8i>, #cir.int<2> : !s64i, #cir.global_view<@_ZTI6Father> : !cir.ptr<!u8i>, #cir.int<2050> : !s64i}> : ![[VTypeInfoB]] {alignment = 8 : i64}
126- // LLVM-DAG: @_ZTI5Child = constant { ptr, ptr, i32, i32, ptr, i64, ptr, i64 } { ptr getelementptr inbounds (ptr , ptr @_ZTVN10__cxxabiv121__vmi_class_type_infoE, i32 2 ), ptr @_ZTS5Child, i32 0, i32 2, ptr @_ZTI6Mother, i64 2, ptr @_ZTI6Father, i64 2050 }
130+ // LLVM-DAG: @_ZTI5Child = constant { ptr, ptr, i32, i32, ptr, i64, ptr, i64 } { ptr getelementptr inbounds nuw (i8 , ptr @_ZTVN10__cxxabiv121__vmi_class_type_infoE, i64 16 ), ptr @_ZTS5Child, i32 0, i32 2, ptr @_ZTI6Mother, i64 2, ptr @_ZTI6Father, i64 2050 }
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