@@ -777,6 +777,18 @@ mlir::LogicalResult CIRToLLVMMemSetOpLowering::matchAndRewrite(
777777 return mlir::success ();
778778}
779779
780+ mlir::LogicalResult CIRToLLVMMemSetInlineOpLowering::matchAndRewrite (
781+ cir::MemSetInlineOp op, OpAdaptor adaptor,
782+ mlir::ConversionPatternRewriter &rewriter) const {
783+ auto converted = rewriter.create <mlir::LLVM::TruncOp>(
784+ op.getLoc (), mlir::IntegerType::get (op.getContext (), 8 ),
785+ adaptor.getVal ());
786+ rewriter.replaceOpWithNewOp <mlir::LLVM::MemsetInlineOp>(
787+ op, adaptor.getDst (), converted, adaptor.getLenAttr (),
788+ /* isVolatile=*/ false );
789+ return mlir::success ();
790+ }
791+
780792static mlir::Value getLLVMIntCast (mlir::ConversionPatternRewriter &rewriter,
781793 mlir::Value llvmSrc, mlir::Type llvmDstIntTy,
782794 bool isUnsigned, uint64_t cirSrcWidth,
@@ -1851,8 +1863,8 @@ mlir::LogicalResult CIRToLLVMVAArgOpLowering::matchAndRewrite(
18511863 return op.emitError (" cir.vaarg lowering is NYI" );
18521864}
18531865
1854- // / Returns the name used for the linkage attribute. This *must* correspond
1855- // / to the name of the attribute in ODS.
1866+ // / Returns the name used for the linkage attribute. This *must* correspond
1867+ // / to the name of the attribute in ODS.
18561868StringRef CIRToLLVMFuncOpLowering::getLinkageAttrNameString () {
18571869 return " linkage" ;
18581870}
@@ -1886,8 +1898,8 @@ void CIRToLLVMFuncOpLowering::lowerFuncAttributes(
18861898 }
18871899}
18881900
1889- // / When do module translation, we can only translate LLVM-compatible types.
1890- // / Here we lower possible OpenCLKernelMetadataAttr to use the converted type.
1901+ // / When do module translation, we can only translate LLVM-compatible types.
1902+ // / Here we lower possible OpenCLKernelMetadataAttr to use the converted type.
18911903void CIRToLLVMFuncOpLowering::lowerFuncOpenCLKernelMetadata (
18921904 mlir::NamedAttribute &extraAttrsEntry) const {
18931905 const auto attrKey = cir::OpenCLKernelMetadataAttr::getMnemonic ();
@@ -2100,8 +2112,8 @@ mlir::LogicalResult CIRToLLVMSwitchFlatOpLowering::matchAndRewrite(
21002112 return mlir::success ();
21012113}
21022114
2103- // / Replace CIR global with a region initialized LLVM global and update
2104- // / insertion point to the end of the initializer block.
2115+ // / Replace CIR global with a region initialized LLVM global and update
2116+ // / insertion point to the end of the initializer block.
21052117void CIRToLLVMGlobalOpLowering::setupRegionInitializedLLVMGlobalOp (
21062118 cir::GlobalOp op, mlir::ConversionPatternRewriter &rewriter) const {
21072119 const auto llvmType = getTypeConverter ()->convertType (op.getSymType ());
@@ -3891,8 +3903,9 @@ void populateCIRToLLVMConversionPatterns(
38913903 CIRToLLVMBaseClassAddrOpLowering, CIRToLLVMDerivedClassAddrOpLowering,
38923904 CIRToLLVMVTTAddrPointOpLowering, CIRToLLVMIsFPClassOpLowering,
38933905 CIRToLLVMAbsOpLowering, CIRToLLVMMemMoveOpLowering,
3894- CIRToLLVMMemSetOpLowering, CIRToLLVMMemCpyInlineOpLowering,
3895- CIRToLLVMSignBitOpLowering, CIRToLLVMPtrMaskOpLowering
3906+ CIRToLLVMMemSetOpLowering, CIRToLLVMMemSetInlineOpLowering,
3907+ CIRToLLVMMemCpyInlineOpLowering, CIRToLLVMSignBitOpLowering,
3908+ CIRToLLVMPtrMaskOpLowering
38963909#define GET_BUILTIN_LOWERING_LIST
38973910#include " clang/CIR/Dialect/IR/CIRBuiltinsLowering.inc"
38983911#undef GET_BUILTIN_LOWERING_LIST
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