[CIR][CIRGen][Builtin][Neon] Lower neon_vaddlv s16 and u16 (llvm#1352)

Lower `neon_vaddlv_s16` and `neon_vaddlv_u16`

Author: AmrDeveloper

clang/lib/CIR/CodeGen/CIRGenBuiltinAArch64.cpp

@@ -4375,9 +4375,6 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
   case NEON::BI__builtin_neon_vaddlv_u8: {
     llvm_unreachable("NEON::BI__builtin_neon_vaddlv_u8 NYI");
   }
-  case NEON::BI__builtin_neon_vaddlv_u16: {
-    llvm_unreachable("NEON::BI__builtin_neon_vaddlv_u16 NYI");
-  }
   case NEON::BI__builtin_neon_vaddlvq_u8: {
     llvm_unreachable("NEON::BI__builtin_neon_vaddlvq_u8 NYI");
   }
@@ -4395,8 +4392,16 @@ CIRGenFunction::emitAArch64BuiltinExpr(unsigned BuiltinID, const CallExpr *E,
   case NEON::BI__builtin_neon_vaddlv_s8: {
     llvm_unreachable("NEON::BI__builtin_neon_vaddlv_s8 NYI");
   }
+  case NEON::BI__builtin_neon_vaddlv_u16:
+    usgn = true;
+    [[fallthrough]];
   case NEON::BI__builtin_neon_vaddlv_s16: {
-    llvm_unreachable("NEON::BI__builtin_neon_vaddlv_s16 NYI");
+    mlir::Type argTy = cir::VectorType::get(builder.getContext(),
+                                            usgn ? UInt16Ty : SInt16Ty, 4);
+    llvm::SmallVector<mlir::Value, 1> argOps = {emitScalarExpr(E->getArg(0))};
+    return emitNeonCall(builder, {argTy}, argOps,
+                        usgn ? "aarch64.neon.uaddlv" : "aarch64.neon.saddlv",
+                        usgn ? UInt32Ty : SInt32Ty, getLoc(E->getExprLoc()));
   }
   case NEON::BI__builtin_neon_vaddlvq_s8: {
     llvm_unreachable("NEON::BI__builtin_neon_vaddlvq_s8 NYI");

clang/test/CIR/CodeGen/AArch64/neon-arith.c

@@ -906,6 +906,29 @@ int32_t test_vaddlvq_s16(int16x8_t a) {
   // LLVM: ret i32 [[VADDLV_I]]
 }
 
+
+int32_t test_vaddlv_s16(int16x4_t a) {
+  return vaddlv_s16(a);
+
+  // CIR-LABEL: vaddlv_s16
+  // CIR: cir.llvm.intrinsic "aarch64.neon.saddlv" {{%.*}}: (!cir.vector<!s16i x 4>) -> !s32i
+
+  // LLVM: {{.*}}test_vaddlv_s16(<4 x i16>{{.*}}[[A:%.*]])
+  // LLVM: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.saddlv.i32.v4i16(<4 x i16> [[A]])
+  // LLVM: ret i32 [[VADDLV_I]]
+}
+
+int32_t test_vaddlv_u16(uint16x4_t a) {
+  return vaddlv_u16(a);
+
+  // CIR-LABEL: vaddlv_u16
+  // CIR: cir.llvm.intrinsic "aarch64.neon.uaddlv" {{%.*}}: (!cir.vector<!u16i x 4>) -> !u32i
+
+  // LLVM: {{.*}}test_vaddlv_u16(<4 x i16>{{.*}}[[A:%.*]])
+  // LLVM: [[VADDLV_I:%.*]] = call i32 @llvm.aarch64.neon.uaddlv.i32.v4i16(<4 x i16> [[A]])
+  // LLVM: ret i32 [[VADDLV_I]]
+}
+
 uint16_t test_vaddv_u16(uint16x4_t a) {
   return vaddv_u16(a);