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Adding MSP CMSIS-DRIVER I2C interface layer.
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‎source/Drivers_Interface/Driver_I2C_MSP.c‎

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/*
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* Copyright (C) 2024-2025 Texas Instruments Incorporated
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*!****************************************************************************
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* @file Driver_I2C_MSP.c
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******************************************************************************
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*/
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#include <ti/driverlib/driverlib.h>
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#include <Driver_I2C_MSP_Priv.h>
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#include <Driver_I2C_MSP.h>
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/* The I2Cx driver instance expansion generators are given below.
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* These generators are used to create the corresponding data structures and
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* function linkage implementations that are required by the Arm
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* CMSIS-Drivers specification for each individual I2C driver instance used
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* in an application.
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*/
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#define GEN_DRIVER_I2C_MSP_STATE(inst) \
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DRIVER_I2C_MSP_STATE DRIVER_I2C##inst##_MSP_STATE;
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#define GEN_DRIVER_I2C_MSP(inst) \
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DRIVER_I2C_MSP DRIVER_I2C##inst##_MSP = \
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{ \
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.hw = I2C##inst, \
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.state = &DRIVER_I2C##inst##_MSP_STATE, \
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.sdaPin.iomuxPinCtlMgmtRegIndex = DRIVER_I2C##inst##_SDA_PINCM, \
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.sdaPin.iomuxPinFunction = DRIVER_I2C##inst##_SDA_PF, \
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.sclPin.iomuxPinCtlMgmtRegIndex = DRIVER_I2C##inst##_SCL_PINCM, \
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.sclPin.iomuxPinFunction = DRIVER_I2C##inst##_SCL_PF, \
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.transmitDMA.hw = DRIVER_I2C##inst##_TRANSMIT_DMA_HW, \
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.transmitDMA.ch = DRIVER_I2C##inst##_TRANSMIT_DMA_CH, \
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.transmitDMA.trig = DRIVER_I2C##inst##_TRANSMIT_DMA_TRIG, \
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.receiveDMA.hw = DRIVER_I2C##inst##_RECEIVE_DMA_HW, \
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.receiveDMA.ch = DRIVER_I2C##inst##_RECEIVE_DMA_CH, \
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.receiveDMA.trig = DRIVER_I2C##inst##_RECEIVE_DMA_TRIG, \
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.clock = DRIVER_I2C##inst##_CLOCK_SEL, \
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.clockFreq = DRIVER_I2C##inst##_CLOCK_FREQ, \
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.irq = I2C##inst##_INT_IRQn \
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};
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#define GEN_DRIVER_I2C_MSP_FXNS(inst) \
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static ARM_I2C_CAPABILITIES MSP_ARM_I2C##inst##_GetCapabilities(void) \
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{ \
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return MSP_ARM_I2C_GetCapabilities(&DRIVER_I2C##inst##_MSP); \
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} \
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static int32_t MSP_ARM_I2C##inst##_Initialize(ARM_I2C_SignalEvent_t cb_event) \
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{ \
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return MSP_ARM_I2C_Initialize(&DRIVER_I2C##inst##_MSP, cb_event); \
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} \
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static int32_t MSP_ARM_I2C##inst##_Uninitialize(void) \
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{ \
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return MSP_ARM_I2C_Uninitialize(&DRIVER_I2C##inst##_MSP); \
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} \
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static int32_t MSP_ARM_I2C##inst##_PowerControl(ARM_POWER_STATE state) \
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{ \
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return MSP_ARM_I2C_PowerControl(&DRIVER_I2C##inst##_MSP, state); \
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} \
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static int32_t MSP_ARM_I2C##inst##_MasterTransmit(uint32_t addr, \
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const uint8_t *data, uint32_t num, bool xfer_pending) \
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{ \
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return MSP_ARM_I2C_MasterTransmit(&DRIVER_I2C##inst##_MSP, addr, data, num, \
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xfer_pending); \
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} \
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static int32_t MSP_ARM_I2C##inst##_MasterReceive(uint32_t addr, uint8_t *data, \
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uint32_t num, bool xfer_pending) \
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{ \
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return MSP_ARM_I2C_MasterReceive(&DRIVER_I2C##inst##_MSP, addr, data, num, \
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xfer_pending); \
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} \
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static int32_t MSP_ARM_I2C##inst##_SlaveTransmit(const uint8_t *data, \
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uint32_t num) \
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{ \
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return MSP_ARM_I2C_SlaveTransmit(&DRIVER_I2C##inst##_MSP, data, num); \
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} \
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static int32_t MSP_ARM_I2C##inst##_SlaveReceive(uint8_t *data, uint32_t num) \
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{ \
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return MSP_ARM_I2C_SlaveReceive(&DRIVER_I2C##inst##_MSP, data, num); \
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} \
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static int32_t MSP_ARM_I2C##inst##_GetDataCount(void) \
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{ \
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return MSP_ARM_I2C_GetDataCount(&DRIVER_I2C##inst##_MSP); \
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} \
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static int32_t MSP_ARM_I2C##inst##_Control(uint32_t control, uint32_t arg) \
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{ \
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return MSP_ARM_I2C_Control(&DRIVER_I2C##inst##_MSP, control, arg); \
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} \
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static ARM_I2C_STATUS MSP_ARM_I2C##inst##_GetStatus(void) \
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{ \
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return MSP_ARM_I2C_GetStatus(&DRIVER_I2C##inst##_MSP); \
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} \
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#define GEN_DRIVER_I2C_MSP_IF(inst) \
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ARM_DRIVER_I2C Driver_I2C##inst = \
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{ \
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MSP_ARM_I2C_GetVersion, \
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MSP_ARM_I2C##inst##_GetCapabilities, \
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MSP_ARM_I2C##inst##_Initialize, \
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MSP_ARM_I2C##inst##_Uninitialize, \
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MSP_ARM_I2C##inst##_PowerControl, \
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MSP_ARM_I2C##inst##_MasterTransmit, \
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MSP_ARM_I2C##inst##_MasterReceive, \
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MSP_ARM_I2C##inst##_SlaveTransmit, \
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MSP_ARM_I2C##inst##_SlaveReceive, \
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MSP_ARM_I2C##inst##_GetDataCount, \
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MSP_ARM_I2C##inst##_Control, \
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MSP_ARM_I2C##inst##_GetStatus, \
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};
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#define GEN_DRIVER_I2C_MSP_ISR(inst) \
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void I2C##inst##_IRQHandler(void) \
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{ \
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MSP_ARM_I2C_IRQHandler(&DRIVER_I2C##inst##_MSP); \
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}
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/* I2Cx Definitions */
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#if defined(I2C0_BASE) && (DRIVER_CONFIG_HAS_I2C0==1)
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GEN_DRIVER_I2C_MSP_STATE(0)
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GEN_DRIVER_I2C_MSP(0)
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GEN_DRIVER_I2C_MSP_FXNS(0)
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GEN_DRIVER_I2C_MSP_IF(0)
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GEN_DRIVER_I2C_MSP_ISR(0)
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#endif
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#if defined(I2C1_BASE) && (DRIVER_CONFIG_HAS_I2C1==1)
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GEN_DRIVER_I2C_MSP_STATE(1)
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GEN_DRIVER_I2C_MSP(1)
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GEN_DRIVER_I2C_MSP_FXNS(1)
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GEN_DRIVER_I2C_MSP_IF(1)
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GEN_DRIVER_I2C_MSP_ISR(1)
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#endif
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#if defined(I2C2_BASE) && (DRIVER_CONFIG_HAS_I2C2==1)
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GEN_DRIVER_I2C_MSP_STATE(2)
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GEN_DRIVER_I2C_MSP(2)
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GEN_DRIVER_I2C_MSP_FXNS(2)
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GEN_DRIVER_I2C_MSP_IF(2)
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GEN_DRIVER_I2C_MSP_ISR(2)
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#endif

‎source/Drivers_Interface/Driver_I2C_MSP.h‎

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/*
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* Copyright (C) 2024-2025 Texas Instruments Incorporated
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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/*!****************************************************************************
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* @file Driver_I2C_MSP.h
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* @brief MSP I2C CMSIS-Driver for Cortex-M based devices with
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* I2C peripheral instances.
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*
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* The CMSIS-Drivers I2C driver allows for simple, non-blocking I2C
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* transmit and receive communication via a high-level, Arm-standardized API.
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* This driver is developed to be compatible with the Arm CMSIS-Driver
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* specification.
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*
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*
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******************************************************************************
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*/
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#ifndef DRIVER_I2C_MSP_H_
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#define DRIVER_I2C_MSP_H_
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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#include <ti/devices/msp/msp.h>
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#include <Driver_I2C.h>
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#include "Driver_Config_MSP.h"
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/*
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* The structure declarations below are the interfaces to
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* the driver for each respective I2C instance.
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*/
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#if defined(I2C0_BASE) && defined(DRIVER_CONFIG_HAS_I2C0)
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extern ARM_DRIVER_I2C Driver_I2C0;
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#endif
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#if defined(I2C1_BASE) && defined(DRIVER_CONFIG_HAS_I2C1)
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extern ARM_DRIVER_I2C Driver_I2C1;
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#endif
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#if defined(I2C2_BASE) && defined(DRIVER_CONFIG_HAS_I2C2)
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extern ARM_DRIVER_I2C Driver_I2C2;
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#endif
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#ifdef __cplusplus
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}
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#endif
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#endif /* DRIVER_I2C_MSP_H_ */

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