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1 | 1 | .. http://processors.wiki.ti.com/index.php/Processor_SDK_LINUX_PTP |
2 | 2 |
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3 | 3 | Overview |
4 | | -=========== |
| 4 | +======== |
5 | 5 |
|
6 | 6 | The Precision Time Protocol (PTP), defined in IEEE 1588, is a protocol |
7 | 7 | used to synchronize clocks throughout a network. Many applications in |
@@ -55,7 +55,7 @@ Processor SDK. |
55 | 55 | .. Image:: /images/Software-arch-v1.jpg |
56 | 56 |
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57 | 57 | Software Components |
58 | | --------------------- |
| 58 | +------------------- |
59 | 59 |
|
60 | 60 | - PRUETH driver – Kernel driver abstracts PRU hardware/firmware |
61 | 61 | - PRUPTP driver – Kernel driver abstracts PRU-ICSS based PTP support |
@@ -133,15 +133,15 @@ OC slaves) for a total of 2 ports since each PRU-ICSS functions as a single PTP |
133 | 133 | clock entity. |
134 | 134 |
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135 | 135 | GMAC |
136 | | ------ |
| 136 | +---- |
137 | 137 |
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138 | 138 | GMAC interface can be configured to run at either 100 Mbps or 1 Gbps. |
139 | 139 | CPTS hardware block helps with timestamping of packets. Refer to |
140 | 140 | `here <Foundational_Components/Kernel/Kernel_Drivers/Network/CPSW.html#common-platform-time-sync-cpts>`__ |
141 | 141 | for details. |
142 | 142 |
|
143 | 143 | PRU-ICSS |
144 | | ---------- |
| 144 | +-------- |
145 | 145 |
|
146 | 146 | The processing load is shared between firmware (PRU) and Host (ARM) with |
147 | 147 | the firmware doing most of the time critical activities. The IEP |
@@ -210,7 +210,7 @@ the relevant boot command (e.g. 'bootcmd', mmcboot' or 'netboot') |
210 | 210 |
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211 | 211 |
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212 | 212 | PRU-ICSS IEP |
213 | | -------------- |
| 213 | +------------ |
214 | 214 |
|
215 | 215 | IEP has an additional hardware to generate a programmable sync output |
216 | 216 | which is tied to the IEP counter. This is called the SYNC unit. For this |
@@ -262,7 +262,7 @@ assigned PTP ports. |
262 | 262 | measure jitter. |
263 | 263 |
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264 | 264 | GMAC |
265 | | ------- |
| 265 | +---- |
266 | 266 |
|
267 | 267 | The GMAC/CPTS does not support a programmable sync output. Instead, the |
268 | 268 | GP Timer16 can be programmed to generate an output pulse every 100ms or |
@@ -716,15 +716,15 @@ ingressLatency in the sample ptp4l configuration file oc.cfg in the |
716 | 716 | ptp4l example above. |
717 | 717 |
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718 | 718 | Limitations |
719 | | -^^^^^^^^^^^^^ |
| 719 | +^^^^^^^^^^^ |
720 | 720 |
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721 | 721 | Although there are two Ethernet ports available on each ICSS-PRU |
722 | 722 | present, ICSS-PRU PTP OC can only be supported on at most **ONE** such |
723 | 723 | port. It cannot provide PTP OC functionality on both Ethernet ports on |
724 | 724 | the same ICSS-PRU simultaneously. |
725 | 725 |
|
726 | 726 | PTP Ordinary Clock on GMAC |
727 | | ---------------------------- |
| 727 | +-------------------------- |
728 | 728 | Refer to `here <Foundational_Components/Kernel/Kernel_Drivers/Network/CPSW.html#common-platform-time-sync-cpts>`__ |
729 | 729 | for more details about the CPTS driver and how to run **linuxptp** over the CPSW GMAC port |
730 | 730 | for providing the PTP OC functionality. |
@@ -807,7 +807,7 @@ slave mode: |
807 | 807 | | |
808 | 808 |
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809 | 809 | PHY Delay Compensation for AM57xx IDK |
810 | | -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
| 810 | +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ |
811 | 811 |
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812 | 812 | The theoretical values to use for GMAC PHY, which is KSZ9031RN, on |
813 | 813 | AM57xx IDKs, are not yet available. The following experimental values |
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