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style: use isonum standard symbols for micro
Use isonum standard symbol definitions for the micro symbol. Signed-off-by: Randolph Sapp <[email protected]>
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source/common/EVM_Hardware_Setup/_AM572x_GP_EVM_Hardware_Setup.rst

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**Other components:**
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- µSD card with Linux SDK
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- |micro|\ SD card with Linux SDK
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- USB-to-serial debug cable
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- HDMI cable for optional external display
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- LCD brackets

source/common/EVM_Hardware_Setup/_TMDXIDK5728_Hardware_Setup.rst

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|
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+--------------------------------------------------------------------------+
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| **1. Once you have received the TI-RTOS or Linux™ software from your TI |
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| representative, create a bootable µSD card (using the included blank |
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| µSD) and insert it into the EVM** |
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+--------------------------------------------------------------------------+
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| .. raw:: html |
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| |
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| <div class="thumb tleft"> |
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| .. raw:: html |
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| <div class="thumbinner" style="width:227px;"> |
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| .. raw:: html |
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| .. Image:: /images/IDK_uSD.png |
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+--------------------------------------------------------------------------+
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+------------------------------------------------------------------------------+
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| **1. Once you have received the TI-RTOS or Linux™ software from your TI |
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| representative, create a bootable |micro|\ SD card (using the included blank |
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| |micro|\ SD) and insert it into the EVM** |
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+------------------------------------------------------------------------------+
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| .. raw:: html |
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| |
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| <div class="thumb tleft"> |
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| |
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| .. raw:: html |
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| |
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| <div class="thumbinner" style="width:227px;"> |
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| |
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| .. raw:: html |
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| |
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| <div class="thumbcaption"> |
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| |
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| .. raw:: html |
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| |
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| <div class="magnify"> |
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| |
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| .. Image:: /images/IDK_uSD.png |
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+------------------------------------------------------------------------------+
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+--------------------------------------------------------------------------+
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| **2. Connect the power cable to the power jack on the board and plug in |

source/linux/Industrial_Protocols/_SORTE.rst

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.. include:: <isonum.txt>
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**********************************
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SORTE
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**********************************
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The Simple Open Real-time Ethernet protocol (SORTE) is a
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TI-developed industrial Ethernet protocol that
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supports 4-µs cycle time. The SORTE protocol operates exclusively on
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supports 4-\ |micro|\ s cycle time. The SORTE protocol operates exclusively on
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TI's PRU-ICSS (Programmable Real-Time Unit Subsystem and Industrial
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Communication SubSystem), and therefore, the ARM Cortex-A8, A9 or A15 processors
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(depending on the device family) are available for industrial applications.

source/rtos/PDK_Platform_Software/Device_Drivers/_TSIP.rst

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.. include:: <isonum.txt>
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.. http://processors.wiki.ti.com/index.php/Processor_SDK_RTOS_TSIP
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Overview
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signals, or one frame sync and serial clock for transmit and the second
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frame sync and clock for receive. The standard serial data rate for each
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TSIP transmit and receive data signal is 8.192 Mbps. The standard frame
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sync is a one or more bit wide pulse that occurs once every 125 µs or a
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sync is a one or more bit wide pulse that occurs once every 125 |micro|\ s or a
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minimum of one serial clock period every 1024 serial clocks.
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At the standard rate and default configuration there are eight transmit

source/rtos/PDK_Platform_Software/PRU_ICSS_Drivers/_IOLINK_FIRMWARE.rst

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.. include:: <isonum.txt>
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.. http://ap-fpdsp-swapps.dal.design.ti.com/index.php/Processor_SDK_RTOS_IOLINK_FIRMWARE
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Introduction
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+-----------------------------------+-----------------------------------+
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| Baud Rate | COM1/COM2/COM3 |
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+-----------------------------------+-----------------------------------+
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| Minumum Cycle Time | 400 µs |
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| Minumum Cycle Time | 400 |micro|\ s |
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+-----------------------------------+-----------------------------------+
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| Maximum Cycle Time | 132 ms |
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+-----------------------------------+-----------------------------------+

source/rtos/PDK_Platform_Software/PRU_ICSS_Drivers/_PRU_ICSS_SORTE.rst

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.. include:: <isonum.txt>
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Introduction
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============
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=================
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The SORTE protocol is a TI-developed industrial Ethernet protocol that
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supports 4-µs cycle time. The SORTE protocol operates on the PRU-ICSS,
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supports 4-\ |micro|\ s cycle time. The SORTE protocol operates on the PRU-ICSS,
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which is an industrial peripheral within Sitara and KeyStone processors
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from Texas Instruments. SORTE protocol operates exclusively on the
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PRU-ICSS; therefore, the ARM Cortex-A8, A9 or A15 processors – depending

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