diff --git a/source/linux/Foundational_Components/Power_Management/pm_dfs.rst b/source/linux/Foundational_Components/Power_Management/pm_dfs.rst index cc0e87b38..24f9271d2 100644 --- a/source/linux/Foundational_Components/Power_Management/pm_dfs.rst +++ b/source/linux/Foundational_Components/Power_Management/pm_dfs.rst @@ -24,18 +24,21 @@ frequency. The following governors are available within the kernel: - **userspace**: This governor allows the user to set the desired OPP using any value found within scaling\_available\_frequencies by echoing it into scaling\_setspeed. +- **schedutil**: This governor uses the Linux kernel scheduler utilization + data to set the frequency. More in depth documentation about each governor can be found in the linux kernel documentation here: https://www.kernel.org/doc/Documentation/cpu-freq/governors.txt -By default, cpufreq, the cpufreq driver, and all of the standard -governors are enabled with the ondemand governor selected as the default -governor. To make changes, follow the instructions below. +The kernel enables to cpufreq driver, and the ondemand, performance, and +userspace governors by default. The kernel enables the conservative and +powersave governors as modules. To make changes, use the following +instructions. .. rubric:: Source Location -drivers/cpufreq/cpufreq-dt.c +:file:`drivers/cpufreq/cpufreq-dt.c` The OPP data itself is used by the cpufreq DT driver to scale frequencies based on the governors. @@ -45,111 +48,111 @@ based on the governors. The driver can be built into the kernel as a static module, dynamic module, or both. -$ make menuconfig +.. code-block:: console + + $ make menuconfig Select CPU Power Management from the main menu. .. code-block:: text - ... - ... - Boot options ---> - CPU Power Management ---> - Floating point emulation ---> - ... + ... + Boot options ---> + Power management options ---> + CPU Power Management ---> + ACPI (Advanced Configuration and Power Interface) Support ---- + ... Select CPU Frequency Scaling as shown here: .. code-block:: text - ... - ... - CPU Frequency Scaling ---> - [*] CPU idle PM support - ... + CPU Idle ---> + CPU Frequency scaling ---> All relevant options are listed below: .. code-block:: text - [*] CPU Frequency scaling - <*> CPU frequency translation statistics - [*] CPU frequency translation statistics details - Default CPUFreq governor (userspace) ---> - <*> 'performance' governor - <*> 'powersave' governor - -*- 'userspace' governor for userspace frequency scaling - <*> 'ondemand' cpufreq policy governor - <*> 'conservative' cpufreq governor - *** CPU frequency scaling drivers *** - Generic DT based cpufreq driver - Generic DT based cpufreq driver using clk notifiers - <*> Texas Instruments CPUFreq support - ... + [*] CPU Frequency scaling + [*] CPU frequency transition statistics + Default CPUFreq governor (performance) ---> + -*- 'performance' governor + 'powersave' governor + <*> 'userspace' governor for userspace frequency scaling + <*> 'ondemand' cpufreq policy governor + 'conservative' cpufreq governor + [ ] 'schedutil' cpufreq policy governor + *** CPU frequency scaling drivers *** + <*> Generic DT based cpufreq driver + -*- Generic DT based cpufreq platdev driver + <*> SCMI based CPUfreq driver + [*] Texas Instruments CPUFreq support + ... .. ifconfig:: CONFIG_part_variant in ('J7200') - .. rubric:: DT Configuration - - The clock information and the operating-points table need to be added as - given in the example below. + .. rubric:: DT Configuration - .. code-block:: dts + The clock information and the operating-points table need to be added as + given in the example below. - /* From arch/arm64/boot/dts/ti/k3-j7200.dtsi */ + .. code-block:: dts - cpus { - #address-cells = <1>; - #size-cells = <0>; - cpu-map { - cluster0: cluster0 { - core0 { - cpu = <&cpu0>; - }; + /* From arch/arm64/boot/dts/ti/k3-j7200.dtsi */ - core1 { - cpu = <&cpu1>; - }; + cpus { + #address-cells = <1>; + #size-cells = <0>; + cpu-map { + cluster0: cluster0 { + core0 { + cpu = <&cpu0>; }; + core1 { + cpu = <&cpu1>; + }; }; - cpu0: cpu@0 { - compatible = "arm,cortex-a72"; - reg = <0x000>; - device_type = "cpu"; - enable-method = "psci"; - i-cache-size = <0xc000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <0x8000>; - d-cache-line-size = <64>; - d-cache-sets = <256>; - next-level-cache = <&L2_0>; - clocks = <&k3_clks 202 2>; - clock-names = "cpu"; - operating-points-v2 = <&cpu0_opp_table>; - #cooling-cells = <2>; /* min followed by max */ - }; + }; - cpu1: cpu@1 { - compatible = "arm,cortex-a72"; - reg = <0x001>; - device_type = "cpu"; - enable-method = "psci"; - i-cache-size = <0xc000>; - i-cache-line-size = <64>; - i-cache-sets = <256>; - d-cache-size = <0x8000>; - d-cache-line-size = <64>; - d-cache-sets = <256>; - next-level-cache = <&L2_0>; - operating-points-v2 = <&cpu0_opp_table>; - #cooling-cells = <2>; /* min followed by max */ - clocks = <&k3_clks 203 0>; - clock-names = "cpu"; - }; + cpu0: cpu@0 { + compatible = "arm,cortex-a72"; + reg = <0x000>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&L2_0>; + clocks = <&k3_clks 202 2>; + clock-names = "cpu"; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + }; + + cpu1: cpu@1 { + compatible = "arm,cortex-a72"; + reg = <0x001>; + device_type = "cpu"; + enable-method = "psci"; + i-cache-size = <0xc000>; + i-cache-line-size = <64>; + i-cache-sets = <256>; + d-cache-size = <0x8000>; + d-cache-line-size = <64>; + d-cache-sets = <256>; + next-level-cache = <&L2_0>; + operating-points-v2 = <&cpu0_opp_table>; + #cooling-cells = <2>; /* min followed by max */ + clocks = <&k3_clks 203 0>; + clock-names = "cpu"; }; + }; .. rubric:: Driver Usage @@ -162,44 +165,44 @@ To view available governors, .. code-block:: console - $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_governors - conservative userspace powersave ondemand performance + $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_governors + conservative userspace powersave ondemand performance To view current governor, .. code-block:: console - $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor - ondemand + $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor + ondemand To set a governor, .. code-block:: console - $ echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor + $ echo userspace > /sys/devices/system/cpu/cpu0/cpufreq/scaling_governor To view current OPP (frequency in kHz) .. code-block:: console - $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq - 2000000000 + $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_cur_freq + 2000000000 To view supported OPP's (frequency in kHz), .. ifconfig:: CONFIG_part_variant in ('J7200') - .. code-block:: console + .. code-block:: console - $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies - 750000000 1000000000 1500000000 2000000000 + $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies + 750000000 1000000000 1500000000 2000000000 .. ifconfig:: CONFIG_part_variant in ('AM62X', 'AM62AX', 'AM62PX', 'J722S') - .. code-block:: console + .. code-block:: console - $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies - 200000 400000 600000 800000 1000000 1250000 1400000 + $ cat /sys/devices/system/cpu/cpu0/cpufreq/scaling_available_frequencies + 200000 400000 600000 800000 1000000 1250000 1400000 To change OPP (can be done only for userspace governor. If governors like ondemand is used, OPP change happens automatically based on the @@ -207,7 +210,7 @@ system load) .. code-block:: console - $ echo 1000000000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed + $ echo 1000000000 > /sys/devices/system/cpu/cpu0/cpufreq/scaling_setspeed | @@ -221,138 +224,137 @@ table. .. ifconfig:: CONFIG_part_variant in ('J7200') - .. code-block:: dts + .. code-block:: dts - /* From arch/arm64/boot/dts/ti/k3-j7200.dtsi */ + /* From arch/arm64/boot/dts/ti/k3-j7200.dtsi */ - cpu0_opp_table: opp-table { - compatible = "operating-points-v2"; + cpu0_opp_table: opp-table { + compatible = "operating-points-v2"; - opp4-2000000000 { - opp-hz = /bits/ 64 <2000000000>; - }; + opp4-2000000000 { + opp-hz = /bits/ 64 <2000000000>; + }; - opp3-1500000000 { - opp-hz = /bits/ 64 <1500000000>; - }; + opp3-1500000000 { + opp-hz = /bits/ 64 <1500000000>; + }; - opp2-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - }; - - opp1-750000000 { - opp-hz = /bits/ 64 <750000000>; - }; - }; + opp2-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + }; + opp1-750000000 { + opp-hz = /bits/ 64 <750000000>; + }; + }; .. ifconfig:: CONFIG_part_variant in ('AM62X', 'AM62AX', 'AM62PX') - The OPP table defined in the following files - allows defining of a different set of OPPs for each different SoC: + The OPP table defined in the following files + allows defining of a different set of OPPs for each different SoC: - .. ifconfig:: CONFIG_part_variant in ('AM62X') + .. ifconfig:: CONFIG_part_variant in ('AM62X') - arch/arm64/boot/dts/ti/k3-am625.dtsi + :file:`arch/arm64/boot/dts/ti/k3-am625.dtsi` - .. ifconfig:: CONFIG_part_variant in ('AM62AX') + .. ifconfig:: CONFIG_part_variant in ('AM62AX') - arch/arm64/boot/dts/ti/k3-am62a7.dtsi + :file:`arch/arm64/boot/dts/ti/k3-am62a7.dtsi` - .. ifconfig:: CONFIG_part_variant in ('AM62PX') + .. ifconfig:: CONFIG_part_variant in ('AM62PX') - arch/arm64/boot/dts/ti/k3-am62p5.dtsi + :file:`arch/arm64/boot/dts/ti/k3-am62p5.dtsi` - .. code-block:: dts + .. code-block:: dts - a53_opp_table: opp-table { - compatible = "operating-points-v2-ti-cpu"; - opp-shared; - syscon = <&wkup_conf>; + a53_opp_table: opp-table { + compatible = "operating-points-v2-ti-cpu"; + opp-shared; + syscon = <&wkup_conf>; - opp-200000000 { - opp-hz = /bits/ 64 <200000000>; - opp-supported-hw = <0x01 0x0007>; - clock-latency-ns = <6000000>; - }; + opp-200000000 { + opp-hz = /bits/ 64 <200000000>; + opp-supported-hw = <0x01 0x0007>; + clock-latency-ns = <6000000>; + }; - opp-400000000 { - opp-hz = /bits/ 64 <400000000>; - opp-supported-hw = <0x01 0x0007>; - clock-latency-ns = <6000000>; - }; + opp-400000000 { + opp-hz = /bits/ 64 <400000000>; + opp-supported-hw = <0x01 0x0007>; + clock-latency-ns = <6000000>; + }; - opp-600000000 { - opp-hz = /bits/ 64 <600000000>; - opp-supported-hw = <0x01 0x0007>; - clock-latency-ns = <6000000>; - }; + opp-600000000 { + opp-hz = /bits/ 64 <600000000>; + opp-supported-hw = <0x01 0x0007>; + clock-latency-ns = <6000000>; + }; - opp-800000000 { - opp-hz = /bits/ 64 <800000000>; - opp-supported-hw = <0x01 0x0007>; - clock-latency-ns = <6000000>; - }; + opp-800000000 { + opp-hz = /bits/ 64 <800000000>; + opp-supported-hw = <0x01 0x0007>; + clock-latency-ns = <6000000>; + }; - opp-1000000000 { - opp-hz = /bits/ 64 <1000000000>; - opp-supported-hw = <0x01 0x0006>; - clock-latency-ns = <6000000>; - }; + opp-1000000000 { + opp-hz = /bits/ 64 <1000000000>; + opp-supported-hw = <0x01 0x0006>; + clock-latency-ns = <6000000>; + }; - opp-1250000000 { - opp-hz = /bits/ 64 <1250000000>; - opp-supported-hw = <0x01 0x0004>; - clock-latency-ns = <6000000>; - opp-suspend; - }; - }; + opp-1250000000 { + opp-hz = /bits/ 64 <1250000000>; + opp-supported-hw = <0x01 0x0004>; + clock-latency-ns = <6000000>; + opp-suspend; + }; + }; - .. ifconfig:: CONFIG_part_variant in ('AM62X', 'AM62PX') + .. ifconfig:: CONFIG_part_variant in ('AM62X', 'AM62PX') - The maximum OPP for A53 requires VDD_CORE to be at 0.85V. - It is enabled in the board-specific dts file: + The maximum OPP for A53 requires VDD_CORE to be at 0.85V. + It is enabled in the board-specific dts file: - .. ifconfig:: CONFIG_part_variant in ('AM62X') + .. ifconfig:: CONFIG_part_variant in ('AM62X') - arch/arm64/boot/dts/ti/k3-am625-sk.dts + :file:`arch/arm64/boot/dts/ti/k3-am625-sk.dts` - .. ifconfig:: CONFIG_part_variant in ('AM62PX') + .. ifconfig:: CONFIG_part_variant in ('AM62PX') - arch/arm64/boot/dts/ti/k3-am62p5-sk.dts + :file:`arch/arm64/boot/dts/ti/k3-am62p5-sk.dts` - .. code-block:: dts + .. code-block:: dts - opp-table { - opp-1400000000 { - opp-hz = /bits/ 64 <1400000000>; - opp-supported-hw = <0x01 0x0004>; - clock-latency-ns = <6000000>; - }; - }; + opp-table { + opp-1400000000 { + opp-hz = /bits/ 64 <1400000000>; + opp-supported-hw = <0x01 0x0004>; + clock-latency-ns = <6000000>; + }; + }; - To disable any of the above OPP's one can simply add + To disable any of the above OPP's one can simply add - .. code-block:: dts + .. code-block:: dts - status = "disabled"; + status = "disabled"; - to the corresponding DT Node. + to the corresponding DT Node. .. ifconfig:: CONFIG_part_variant in ('AM62AX') - To enable maximum clock rates for A53 and C7x on AM62A7-SK Rev E3 - board, an overlay has to be used as shown below: + To enable maximum clock rates for A53 and C7x on AM62A7-SK Rev E3 + board, an overlay has to be used as shown below: - .. code-block:: console + .. code-block:: console - setenv name_overlays ti/k3-am62a7-sk-e3-max-opp.dtbo + setenv name_overlays ti/k3-am62a7-sk-e3-max-opp.dtbo - This overlay adds the 1.4 GHz OPP for A53 cores and disables all - the lower OPPs. It also overrides the clock rate for C7x to 1 GHz. + This overlay adds the 1.4 GHz OPP for A53 cores and disables all + the lower OPPs. It also overrides the clock rate for C7x to 1 GHz. - **Please note: This overlay is meant only for AM62A7-SK Rev E3 boards - that have VDD_CORE at 0.85V. Board Rev E1 and E2 do not meet this - requirement.** Any other boards based on this design should verify - that they have the right silicon variant and the right power tree - before booting with this overlay. + **Please note: This overlay is meant only for AM62A7-SK Rev E3 boards + that have VDD_CORE at 0.85V. Board Rev E1 and E2 do not meet this + requirement.** Any other boards based on this design should verify + that they have the right silicon variant and the right power tree + before booting with this overlay. diff --git a/source/linux/Foundational_Components/Power_Management/pm_low_power_modes.rst b/source/linux/Foundational_Components/Power_Management/pm_low_power_modes.rst index 25697af17..5548847cc 100644 --- a/source/linux/Foundational_Components/Power_Management/pm_low_power_modes.rst +++ b/source/linux/Foundational_Components/Power_Management/pm_low_power_modes.rst @@ -54,23 +54,12 @@ sources is found to be enabled, Partial I/O is entered instead of poweroff. The following wakeup sources have been configured for Partial I/O: mcu_uart0, mcu_mcan0, and mcu_mcan1. Partial I/O mode can only be tested -when `k3-am62x-sk-lpm-wkup-sources.dtso `__ +when `k3-am62x-sk-lpm-wkup-sources.dtso `__ overlay is loaded. Please refer to :ref:`How to enable DT overlays` for more details. After Linux boots, the MCAN wakeup for Partial I/O is enabled. -.. rubric:: To enable UART wakeup: - -.. code-block:: console - - root@:~# echo enabled > /sys/class/tty/ttyS0/device/power/wakeup - -.. note:: - - UART wakeup from Partial I/O is currently being debugged on the EVM. - -With at least one of the wakeup sources enabled, Partial I/O mode can be -entered with the following command: +Enter Partial I/O mode with the following command: .. code-block:: console @@ -89,11 +78,6 @@ activity on the I/O pin programmed for wakeup. For example, if mcu_mcan0 wakeup was enabled, grounding Pin 22 of J8 MCU Header will wakeup the system and it will go through a normal Linux boot process. -.. note:: - - The capability to detect whether system is resuming from Partial I/O - or doing a normal cold boot will be added in future release. - .. _pm_io_only_plus_ddr: ***************** @@ -132,7 +116,7 @@ I/O Only Plus DDR The wakeup sources that can be used to wake the system from I/O Only Plus DDR are mcu_uart0, mcu_mcan0, mcu_mcan1 and wkup_uart0. To use the mcu_mcan0 and mcu_mcan1 wakeup sources, apply the - `k3-am62x-sk-lpm-io-ddr-wkup-sources.dtso `__ + `k3-am62x-sk-lpm-io-ddr-wkup-sources.dtso `__ overlay. Please refer to :ref:`How to enable DT overlays` for more details. To use the mcu_uart0 and wkup_uart0 wakeup sources, direct register writes can be used to enable wakeup after Linux boots. @@ -290,9 +274,12 @@ In order to enter Deep Sleep, use the following command: [ 230.295457] psci: CPU3 killed (polled 0 ms) This partially indicates that Linux has finished it's Deep Sleep suspend sequence. -For further confirmation, one can take a look at the PMIC_LPM_EN pin on the EVM -(after programming the PMCTRL_SYS register (0x43018080) to 0x15). Here, if the pin is 3.3V when active and -0V when in deep sleep. + +.. ifconfig:: CONFIG_part_variant in ('AM62X') + + For further confirmation, program the PMCTRL_SYS register (0x43018080) to + 0x15. The PMIC_LPM_EN pin on the EVM is 3.3V when active and 0V when in + DeepSleep. .. note:: @@ -323,27 +310,6 @@ To enter MCU Only mode, set :code:`100 msec` resume latency for CPU0 in Linux: root@:~# echo 100000 > /sys/devices/system/cpu/cpu0/power/pm_qos_resume_latency_us -.. important:: - - Note that the step below to set "enabled" won't work for current SDK - and will be supported in future release - -.. ifconfig:: CONFIG_part_variant in ('AM62X') - - To enter MCU Only mode, enable MCU M4 core as a wakeup source in linux: - - .. code-block:: console - - root@am62xx-evm:~# echo enabled > /sys/bus/platform/devices/5000000.m4fss/power/wakeup - -.. ifconfig:: CONFIG_part_variant in ('AM62AX', 'AM62PX') - - To enter MCU Only mode, enable MCU R5 core as a wakeup source in linux: - - .. code-block:: console - - root@:~# echo enabled > /sys/bus/platform/devices/79000000.r5f/power/wakeup - Now, the SoC can be suspended using the following command: .. code-block:: console diff --git a/source/linux/Foundational_Components/Power_Management/pm_sw_arch.rst b/source/linux/Foundational_Components/Power_Management/pm_sw_arch.rst index 8288489c9..38ef80f9d 100644 --- a/source/linux/Foundational_Components/Power_Management/pm_sw_arch.rst +++ b/source/linux/Foundational_Components/Power_Management/pm_sw_arch.rst @@ -151,8 +151,8 @@ Specifically, checking of constraints is done at two levels: The code enabling the constraints framework can be found in: -#. TISCI PM Domain driver: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/pmdomain/ti/ti_sci_pm_domains.c?h=11.00.09 -#. TISCI driver: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/firmware/ti_sci.c?h=11.00.09 +#. TISCI PM Domain driver: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/pmdomain/ti/ti_sci_pm_domains.c?h=11.01.05 +#. TISCI driver: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/drivers/firmware/ti_sci.c?h=11.01.05 Examples of adding constraints from the remote core side are being implemented and will be enabled in future release. diff --git a/source/linux/Foundational_Components/Power_Management/pm_wakeup_sources.rst b/source/linux/Foundational_Components/Power_Management/pm_wakeup_sources.rst index 542f8a70f..858ea9f95 100644 --- a/source/linux/Foundational_Components/Power_Management/pm_wakeup_sources.rst +++ b/source/linux/Foundational_Components/Power_Management/pm_wakeup_sources.rst @@ -271,7 +271,7 @@ by configuring the MCU GPIO controller as a wakeup source. In ideal scenarios, the firmware running on MCU core is responsible for configuring MCU GPIO's as a wakeup source. However, if the application design doesn't rely too much on the MCU firmware then Linux can be used to configure the MCU GPIOs as a wakeup source. You can refer to the mcu_gpio_key node in -`k3-am62x-sk-lpm-wkup-sources.dtso `__ +`k3-am62x-sk-lpm-wkup-sources.dtso `__ and use it as a template to configure the MCU GPIO of your choice as a wakeup capable GPIO. A brief guide to configuring an MCU GPIO as wakeup: @@ -330,7 +330,7 @@ source and send a wakeup interrupt to the Device Manager. To understand the role please refer to :ref:`S/W Architecture of System Suspend` MCU GPIO wakeup can only be tested when -`k3-am62x-sk-lpm-wkup-sources.dtso `__ +`k3-am62x-sk-lpm-wkup-sources.dtso `__ overlay is loaded. Please refer to :ref:`How to enable DT overlays` for more details. Once the system has entered Deep Sleep or MCU Only mode as shown in the @@ -373,7 +373,7 @@ Main UART ========= The way to configure UART as an I/O daisy chain wakeup, refer to the -main_uart0 node in `k3-am62x-sk-common.dtsi `_ +main_uart0 node in `k3-am62x-sk-common.dtsi `_ .. code-block:: dts @@ -436,10 +436,10 @@ configuration and working of these frameworks have been covered under the MCU GPIO and Main UART sections. The reference configuration for Main GPIO wakeup can be found under -gpio_key node in `k3-am62x-sk-lpm-wkup-sources.dtso `__ +gpio_key node in `k3-am62x-sk-lpm-wkup-sources.dtso `__ Main GPIO wakeup can only be tested when -`k3-am62x-sk-lpm-wkup-sources.dtso `__ +`k3-am62x-sk-lpm-wkup-sources.dtso `__ overlay is loaded. Please refer to :ref:`How to enable DT overlays` for more details. To use main_gpio as a wakeup source, ensure gpio is a wake-irq in /proc/interrupts: @@ -463,7 +463,7 @@ Sleep and MCU Only modes. In order to use WKUP UART as a wakeup source, it needs to be configured in a generic way using the ti-sysc interconnect target module driver. The reference configuration can be found under target-module in -`k3-am62-wakeup.dtsi `__ +`k3-am62-wakeup.dtsi `__ WKUP UART is generally available on the third serial port (/dev/ttyUSB2) and by default it only shows output from DM R5. @@ -629,7 +629,7 @@ state defined, then the Linux mcan driver is able to switch to the pinctrl "wakeup" state during suspend which enables CAN UART wakeup. The mcan_uart0 and mcan_uart1 nodes in -`k3-am62x-sk-lpm-io-ddr-wkup-sources.dtso `__ +`k3-am62x-sk-lpm-io-ddr-wkup-sources.dtso `__ can be used as a reference for enabling CAN UART wakeup. .. code-block:: text @@ -662,9 +662,9 @@ can be used as a reference for enabling CAN UART wakeup. }; CAN UART wakeup can be tested by using either the -`k3-am62x-sk-lpm-wkup-sources.dtso `__ +`k3-am62x-sk-lpm-wkup-sources.dtso `__ or -`k3-am62x-sk-lpm-io-ddr-wkup-sources.dtso `__ +`k3-am62x-sk-lpm-io-ddr-wkup-sources.dtso `__ overlays. Please refer to :ref:`How to enable DT overlays` for more details.