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Update private CI metrics for tns100
tsmc65lp/gcd [INFO] Tightening rule synth__design__instance__area__stdcell from 2059 to 2058.96. [INFO] Updating failing rule cts__design__instance__count__setup_buffer from 40 to 55. [INFO] Updating failing rule finish__timing__setup__ws from -0.25 to -0.31. gf12/gcd [INFO] Tightening rule synth__design__instance__area__stdcell from 107 to 106.78. [INFO] Updating failing rule globalroute__timing__clock__slack from -43.45 to -59.13. [INFO] Updating failing rule globalroute__timing__setup__ws from -43.46 to -59.13. [INFO] Tightening rule detailedroute__route__wirelength from 4119 to 4117. Signed-off-by: Matt Liberty <[email protected]>
1 parent 980c883 commit 0128098

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4 files changed

+161
-241
lines changed

4 files changed

+161
-241
lines changed

flow/designs/gf12/gcd/metadata-base-ok.json

Lines changed: 77 additions & 117 deletions
Original file line numberDiff line numberDiff line change
@@ -3,10 +3,10 @@
33
"constraints__clocks__details": [
44
"core_clock: 280.0000"
55
],
6-
"cts__clock__skew__hold": 7.51963,
6+
"cts__clock__skew__hold": 7.51873,
77
"cts__clock__skew__hold__post_repair": 7.5652,
88
"cts__clock__skew__hold__pre_repair": 7.5652,
9-
"cts__clock__skew__setup": 3.60595,
9+
"cts__clock__skew__setup": 3.60264,
1010
"cts__clock__skew__setup__post_repair": 3.71054,
1111
"cts__clock__skew__setup__pre_repair": 3.71054,
1212
"cts__design__core__area": 6356.5,
@@ -15,52 +15,40 @@
1515
"cts__design__die__area": 10008.8,
1616
"cts__design__die__area__post_repair": 10008.8,
1717
"cts__design__die__area__pre_repair": 10008.8,
18-
"cts__design__instance__area": 440.585,
18+
"cts__design__instance__area": 440.44,
1919
"cts__design__instance__area__macros": 0,
2020
"cts__design__instance__area__macros__post_repair": 0,
2121
"cts__design__instance__area__macros__pre_repair": 0,
2222
"cts__design__instance__area__post_repair": 429.602,
2323
"cts__design__instance__area__pre_repair": 429.602,
24-
"cts__design__instance__area__stdcell": 440.585,
24+
"cts__design__instance__area__stdcell": 440.44,
2525
"cts__design__instance__area__stdcell__post_repair": 429.602,
2626
"cts__design__instance__area__stdcell__pre_repair": 429.602,
27-
"cts__design__instance__count": 794,
27+
"cts__design__instance__count": 792,
2828
"cts__design__instance__count__hold_buffer": 0,
2929
"cts__design__instance__count__macros": 0,
3030
"cts__design__instance__count__macros__post_repair": 0,
3131
"cts__design__instance__count__macros__pre_repair": 0,
3232
"cts__design__instance__count__post_repair": 783,
3333
"cts__design__instance__count__pre_repair": 783,
34-
"cts__design__instance__count__setup_buffer": 11.0,
35-
"cts__design__instance__count__stdcell": 794,
34+
"cts__design__instance__count__setup_buffer": 9.0,
35+
"cts__design__instance__count__stdcell": 792,
3636
"cts__design__instance__count__stdcell__post_repair": 783,
3737
"cts__design__instance__count__stdcell__pre_repair": 783,
3838
"cts__design__instance__displacement__max": 0.781,
39-
"cts__design__instance__displacement__mean": 0.0135,
40-
"cts__design__instance__displacement__total": 10.8525,
41-
"cts__design__instance__utilization": 0.0693125,
39+
"cts__design__instance__displacement__mean": 0.0125,
40+
"cts__design__instance__displacement__total": 9.98,
41+
"cts__design__instance__utilization": 0.0692897,
4242
"cts__design__instance__utilization__post_repair": 0.0675846,
4343
"cts__design__instance__utilization__pre_repair": 0.0675846,
44-
"cts__design__instance__utilization__stdcell": 0.0693125,
44+
"cts__design__instance__utilization__stdcell": 0.0692897,
4545
"cts__design__instance__utilization__stdcell__post_repair": 0.0675846,
4646
"cts__design__instance__utilization__stdcell__pre_repair": 0.0675846,
4747
"cts__design__io": 54,
4848
"cts__design__io__post_repair": 54,
4949
"cts__design__io__pre_repair": 54,
5050
"cts__design__violations": 0,
51-
"cts__power__internal__total": 0.000854364,
52-
"cts__power__internal__total__post_repair": 0.000812082,
53-
"cts__power__internal__total__pre_repair": 0.000812082,
54-
"cts__power__leakage__total": 1.03801e-07,
55-
"cts__power__leakage__total__post_repair": 9.29337e-08,
56-
"cts__power__leakage__total__pre_repair": 9.29337e-08,
57-
"cts__power__switching__total": 0.000432424,
58-
"cts__power__switching__total__post_repair": 0.000422795,
59-
"cts__power__switching__total__pre_repair": 0.000422795,
60-
"cts__power__total": 0.00128689,
61-
"cts__power__total__post_repair": 0.00123497,
62-
"cts__power__total__pre_repair": 0.00123497,
63-
"cts__route__wirelength__estimated": 3221.06,
51+
"cts__route__wirelength__estimated": 3216.07,
6452
"cts__timing__drv__hold_violation_count": 0,
6553
"cts__timing__drv__hold_violation_count__post_repair": 0,
6654
"cts__timing__drv__hold_violation_count__pre_repair": 0,
@@ -79,19 +67,19 @@
7967
"cts__timing__drv__max_slew": 0,
8068
"cts__timing__drv__max_slew__post_repair": 0,
8169
"cts__timing__drv__max_slew__pre_repair": 0,
82-
"cts__timing__drv__max_slew_limit": 0.932991,
70+
"cts__timing__drv__max_slew_limit": 0.933024,
8371
"cts__timing__drv__max_slew_limit__post_repair": 0.932178,
8472
"cts__timing__drv__max_slew_limit__pre_repair": 0.932178,
85-
"cts__timing__drv__setup_violation_count": 8,
73+
"cts__timing__drv__setup_violation_count": 9,
8674
"cts__timing__drv__setup_violation_count__post_repair": 14,
8775
"cts__timing__drv__setup_violation_count__pre_repair": 14,
88-
"cts__timing__setup__tns": -137.376,
76+
"cts__timing__setup__tns": -151.375,
8977
"cts__timing__setup__tns__post_repair": -487.607,
9078
"cts__timing__setup__tns__pre_repair": -487.607,
91-
"cts__timing__setup__ws": -28.7569,
79+
"cts__timing__setup__ws": -30.8858,
9280
"cts__timing__setup__ws__post_repair": -98.4546,
9381
"cts__timing__setup__ws__pre_repair": -98.4546,
94-
"detailedplace__cpu__total": 4.32,
82+
"detailedplace__cpu__total": 3.78,
9583
"detailedplace__design__core__area": 6356.5,
9684
"detailedplace__design__die__area": 10008.8,
9785
"detailedplace__design__instance__area": 426.698,
@@ -107,13 +95,9 @@
10795
"detailedplace__design__instance__utilization__stdcell": 0.0671279,
10896
"detailedplace__design__io": 54,
10997
"detailedplace__design__violations": 0,
110-
"detailedplace__mem__peak": 332696.0,
111-
"detailedplace__power__internal__total": 0.000657853,
112-
"detailedplace__power__leakage__total": 8.77715e-08,
113-
"detailedplace__power__switching__total": 0.000280706,
114-
"detailedplace__power__total": 0.000938646,
98+
"detailedplace__mem__peak": 338020.0,
11599
"detailedplace__route__wirelength__estimated": 3203.94,
116-
"detailedplace__runtime__total": "0:04.59",
100+
"detailedplace__runtime__total": "0:03.98",
117101
"detailedplace__timing__drv__hold_violation_count": 0,
118102
"detailedplace__timing__drv__max_cap": 0,
119103
"detailedplace__timing__drv__max_cap_limit": 0.893209,
@@ -125,52 +109,48 @@
125109
"detailedplace__timing__setup__tns": -174.07,
126110
"detailedplace__timing__setup__ws": -62.726,
127111
"detailedroute__route__drc_errors": 0,
128-
"detailedroute__route__drc_errors__iter:1": 422,
129-
"detailedroute__route__drc_errors__iter:2": 115,
130-
"detailedroute__route__drc_errors__iter:3": 40,
112+
"detailedroute__route__drc_errors__iter:1": 401,
113+
"detailedroute__route__drc_errors__iter:2": 108,
114+
"detailedroute__route__drc_errors__iter:3": 32,
131115
"detailedroute__route__drc_errors__iter:4": 0,
132-
"detailedroute__route__net": 370,
116+
"detailedroute__route__net": 368,
133117
"detailedroute__route__net__special": 2,
134-
"detailedroute__route__vias": 2626,
118+
"detailedroute__route__vias": 2610,
135119
"detailedroute__route__vias__multicut": 0,
136-
"detailedroute__route__vias__singlecut": 2626,
137-
"detailedroute__route__wirelength": 3582,
138-
"detailedroute__route__wirelength__iter:1": 3615,
139-
"detailedroute__route__wirelength__iter:2": 3597,
140-
"detailedroute__route__wirelength__iter:3": 3582,
141-
"detailedroute__route__wirelength__iter:4": 3582,
142-
"finish__clock__skew__hold": 8.0247,
143-
"finish__clock__skew__setup": 4.20025,
144-
"finish__cpu__total": 5.73,
120+
"detailedroute__route__vias__singlecut": 2610,
121+
"detailedroute__route__wirelength": 3580,
122+
"detailedroute__route__wirelength__iter:1": 3619,
123+
"detailedroute__route__wirelength__iter:2": 3599,
124+
"detailedroute__route__wirelength__iter:3": 3580,
125+
"detailedroute__route__wirelength__iter:4": 3580,
126+
"finish__clock__skew__hold": 8.11304,
127+
"finish__clock__skew__setup": 4.2525,
128+
"finish__cpu__total": 5.28,
145129
"finish__design__core__area": 6356.5,
146130
"finish__design__die__area": 10008.8,
147-
"finish__design__instance__area": 440.585,
131+
"finish__design__instance__area": 440.44,
148132
"finish__design__instance__area__macros": 0,
149-
"finish__design__instance__area__stdcell": 440.585,
150-
"finish__design__instance__count": 794,
133+
"finish__design__instance__area__stdcell": 440.44,
134+
"finish__design__instance__count": 792,
151135
"finish__design__instance__count__macros": 0,
152-
"finish__design__instance__count__stdcell": 794,
153-
"finish__design__instance__utilization": 0.0693125,
154-
"finish__design__instance__utilization__stdcell": 0.0693125,
136+
"finish__design__instance__count__stdcell": 792,
137+
"finish__design__instance__utilization": 0.0692897,
138+
"finish__design__instance__utilization__stdcell": 0.0692897,
155139
"finish__design__io": 54,
156-
"finish__mem__peak": 442992.0,
157-
"finish__power__internal__total": 0.00085917,
158-
"finish__power__leakage__total": 1.03801e-07,
159-
"finish__power__switching__total": 0.000379244,
160-
"finish__power__total": 0.00123852,
161-
"finish__runtime__total": "0:06.57",
140+
"finish__mem__peak": 442096.0,
141+
"finish__runtime__total": "0:05.62",
162142
"finish__timing__drv__hold_violation_count": 0.0,
163143
"finish__timing__drv__max_cap": 0,
164-
"finish__timing__drv__max_cap_limit": 0.903239,
144+
"finish__timing__drv__max_cap_limit": 0.90341,
165145
"finish__timing__drv__max_fanout": 0,
166146
"finish__timing__drv__max_fanout_limit": 1e+30,
167147
"finish__timing__drv__max_slew": 0,
168-
"finish__timing__drv__max_slew_limit": 0.931843,
148+
"finish__timing__drv__max_slew_limit": 0.93231,
169149
"finish__timing__drv__setup_violation_count": 1.0,
170-
"finish__timing__setup__tns": -74.8829,
171-
"finish__timing__setup__ws": -20.8883,
172-
"finish__timing__wns_percent_delay": -8.529726,
173-
"floorplan__cpu__total": 4.16,
150+
"finish__timing__setup__tns": -83.9432,
151+
"finish__timing__setup__ws": -22.8373,
152+
"finish__timing__wns_percent_delay": -9.251965,
153+
"floorplan__cpu__total": 3.64,
174154
"floorplan__design__core__area": 6356.5,
175155
"floorplan__design__die__area": 10008.8,
176156
"floorplan__design__instance__area": 89.3652,
@@ -182,15 +162,11 @@
182162
"floorplan__design__instance__utilization": 0.0140589,
183163
"floorplan__design__instance__utilization__stdcell": 0.0140589,
184164
"floorplan__design__io": 54,
185-
"floorplan__mem__peak": 316528.0,
186-
"floorplan__power__internal__total": 0.000528473,
187-
"floorplan__power__leakage__total": 5.74144e-08,
188-
"floorplan__power__switching__total": 0.000110787,
189-
"floorplan__power__total": 0.000639317,
190-
"floorplan__runtime__total": "0:04.41",
165+
"floorplan__mem__peak": 324788.0,
166+
"floorplan__runtime__total": "0:03.84",
191167
"floorplan__timing__setup__tns": 0,
192168
"floorplan__timing__setup__ws": 25.9648,
193-
"globalplace__cpu__total": 4.58,
169+
"globalplace__cpu__total": 4.08,
194170
"globalplace__design__core__area": 6356.5,
195171
"globalplace__design__die__area": 10008.8,
196172
"globalplace__design__instance__area": 375.605,
@@ -202,45 +178,37 @@
202178
"globalplace__design__instance__utilization": 0.0590899,
203179
"globalplace__design__instance__utilization__stdcell": 0.0590899,
204180
"globalplace__design__io": 54,
205-
"globalplace__mem__peak": 349232.0,
206-
"globalplace__power__internal__total": 0.000529906,
207-
"globalplace__power__leakage__total": 5.74144e-08,
208-
"globalplace__power__switching__total": 0.000213439,
209-
"globalplace__power__total": 0.000743402,
210-
"globalplace__runtime__total": "0:04.85",
181+
"globalplace__mem__peak": 356196.0,
182+
"globalplace__runtime__total": "0:04.28",
211183
"globalplace__timing__setup__tns": -845.961,
212184
"globalplace__timing__setup__ws": -83.7988,
213185
"globalroute__antenna__violating__nets": 0,
214186
"globalroute__antenna__violating__pins": 0,
215-
"globalroute__clock__skew__hold": 9.60351,
216-
"globalroute__clock__skew__setup": 4.45885,
187+
"globalroute__clock__skew__hold": 9.62105,
188+
"globalroute__clock__skew__setup": 4.45557,
217189
"globalroute__design__core__area": 6356.5,
218190
"globalroute__design__die__area": 10008.8,
219-
"globalroute__design__instance__area": 440.585,
191+
"globalroute__design__instance__area": 440.44,
220192
"globalroute__design__instance__area__macros": 0,
221-
"globalroute__design__instance__area__stdcell": 440.585,
222-
"globalroute__design__instance__count": 794,
193+
"globalroute__design__instance__area__stdcell": 440.44,
194+
"globalroute__design__instance__count": 792,
223195
"globalroute__design__instance__count__macros": 0,
224-
"globalroute__design__instance__count__stdcell": 794,
225-
"globalroute__design__instance__utilization": 0.0693125,
226-
"globalroute__design__instance__utilization__stdcell": 0.0693125,
196+
"globalroute__design__instance__count__stdcell": 792,
197+
"globalroute__design__instance__utilization": 0.0692897,
198+
"globalroute__design__instance__utilization__stdcell": 0.0692897,
227199
"globalroute__design__io": 54,
228-
"globalroute__power__internal__total": 0.000859298,
229-
"globalroute__power__leakage__total": 1.03801e-07,
230-
"globalroute__power__switching__total": 0.000466386,
231-
"globalroute__power__total": 0.00132579,
232-
"globalroute__timing__clock__slack": -41.246,
200+
"globalroute__timing__clock__slack": -45.139,
233201
"globalroute__timing__drv__hold_violation_count": 0,
234202
"globalroute__timing__drv__max_cap": 0,
235203
"globalroute__timing__drv__max_cap_limit": 0.883192,
236204
"globalroute__timing__drv__max_fanout": 0,
237205
"globalroute__timing__drv__max_fanout_limit": 1e+30,
238206
"globalroute__timing__drv__max_slew": 0,
239-
"globalroute__timing__drv__max_slew_limit": 0.924101,
240-
"globalroute__timing__drv__setup_violation_count": 10,
241-
"globalroute__timing__setup__tns": -237.46,
242-
"globalroute__timing__setup__ws": -41.2461,
243-
"placeopt__cpu__total": 4.58,
207+
"globalroute__timing__drv__max_slew_limit": 0.923768,
208+
"globalroute__timing__drv__setup_violation_count": 11,
209+
"globalroute__timing__setup__tns": -274.994,
210+
"globalroute__timing__setup__ws": -45.1388,
211+
"placeopt__cpu__total": 4.08,
244212
"placeopt__design__core__area": 6356.5,
245213
"placeopt__design__core__area__pre_opt": 6356.5,
246214
"placeopt__design__die__area": 10008.8,
@@ -263,16 +231,8 @@
263231
"placeopt__design__instance__utilization__stdcell__pre_opt": 0.0590899,
264232
"placeopt__design__io": 54,
265233
"placeopt__design__io__pre_opt": 54,
266-
"placeopt__mem__peak": 349232.0,
267-
"placeopt__power__internal__total": 0.000647022,
268-
"placeopt__power__internal__total__pre_opt": 0.000529906,
269-
"placeopt__power__leakage__total": 8.77715e-08,
270-
"placeopt__power__leakage__total__pre_opt": 5.74144e-08,
271-
"placeopt__power__switching__total": 0.000271237,
272-
"placeopt__power__switching__total__pre_opt": 0.000213439,
273-
"placeopt__power__total": 0.000918347,
274-
"placeopt__power__total__pre_opt": 0.000743402,
275-
"placeopt__runtime__total": "0:04.85",
234+
"placeopt__mem__peak": 356196.0,
235+
"placeopt__runtime__total": "0:04.28",
276236
"placeopt__timing__drv__hold_violation_count": 0,
277237
"placeopt__timing__drv__max_cap": 0,
278238
"placeopt__timing__drv__max_cap_limit": 0.892117,
@@ -286,10 +246,10 @@
286246
"placeopt__timing__setup__ws": -59.0289,
287247
"placeopt__timing__setup__ws__pre_opt": -83.7988,
288248
"run__flow__design": "gcd_9T_gf",
289-
"run__flow__generate_date": "2023-01-20 13:07",
249+
"run__flow__generate_date": "2023-05-03 02:40",
290250
"run__flow__metrics_version": "Metrics_2.1.2",
291251
"run__flow__openroad_commit": "N/A",
292-
"run__flow__openroad_version": "v2.0-6565-g7d2bade83",
252+
"run__flow__openroad_version": "v2.0-7993-gb2fabb1b4",
293253
"run__flow__platform": "gf12",
294254
"run__flow__platform__capacitance_units": "1fF",
295255
"run__flow__platform__current_units": "1uA",
@@ -298,14 +258,14 @@
298258
"run__flow__platform__resistance_units": "1kohm",
299259
"run__flow__platform__time_units": "1ps",
300260
"run__flow__platform__voltage_units": "1v",
301-
"run__flow__platform_commit": "7b691580113b4e2d30ecf76d3ea2f20ff2a61975",
302-
"run__flow__scripts_commit": "17d6d54f0bf6f520a9e6a7a6d576f587c6742c79",
303-
"run__flow__uuid": "be9a02bf-bc9b-4907-85fc-e6ffd4a5e1cb",
261+
"run__flow__platform_commit": "422575641a0b65fd13a7f96a80d6f51a1749b732",
262+
"run__flow__scripts_commit": "b459e9447c176b22902653912b6b3c2709e32985",
263+
"run__flow__uuid": "ef745493-82a9-4fce-847d-ca78218985fa",
304264
"run__flow__variant": "base",
305-
"synth__cpu__total": 7.78,
265+
"synth__cpu__total": 7.22,
306266
"synth__design__instance__area__stdcell": 92.848896,
307267
"synth__design__instance__count__stdcell": 281.0,
308-
"synth__mem__peak": 188872.0,
309-
"synth__runtime__total": "0:08.26",
310-
"total_time": "0:00:33.530000"
268+
"synth__mem__peak": 189088.0,
269+
"synth__runtime__total": "0:07.64",
270+
"total_time": "0:00:29.640000"
311271
}

flow/designs/gf12/gcd/rules-base.json

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
{
22
"synth__design__instance__area__stdcell": {
3-
"value": 107,
3+
"value": 106.78,
44
"compare": "<="
55
},
66
"constraints__clocks__count": {
@@ -40,15 +40,15 @@
4040
"compare": "<="
4141
},
4242
"globalroute__timing__clock__slack": {
43-
"value": -43.45,
43+
"value": -59.13,
4444
"compare": ">="
4545
},
4646
"globalroute__timing__setup__ws": {
47-
"value": -43.46,
47+
"value": -59.13,
4848
"compare": ">="
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},
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"detailedroute__route__wirelength": {
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"value": 4119,
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"value": 4117,
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"compare": "<="
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},
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"detailedroute__route__drc_errors": {

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