33 "constraints__clocks__details" : [
44 " wb_clk_i: 960.0000"
55 ],
6- "cts__clock__skew__hold" : 134.85 ,
7- "cts__clock__skew__hold__post_repair" : 133.9285 ,
8- "cts__clock__skew__hold__pre_repair" : 133.9285 ,
9- "cts__clock__skew__setup" : 134.85 ,
10- "cts__clock__skew__setup__post_repair" : 133.9285 ,
11- "cts__clock__skew__setup__pre_repair" : 133.9285 ,
12- "cts__design__instance__area" : 7655.8706 ,
6+ "cts__clock__skew__hold" : 122.9313 ,
7+ "cts__clock__skew__hold__post_repair" : 121.7047 ,
8+ "cts__clock__skew__hold__pre_repair" : 121.7047 ,
9+ "cts__clock__skew__setup" : 122.9313 ,
10+ "cts__clock__skew__setup__post_repair" : 121.7047 ,
11+ "cts__clock__skew__setup__pre_repair" : 121.7047 ,
12+ "cts__design__instance__area" : 7655.6665 ,
1313 "cts__design__instance__area__macros" : 0.0 ,
1414 "cts__design__instance__area__macros__post_repair" : 0.0 ,
1515 "cts__design__instance__area__macros__pre_repair" : 0.0 ,
1616 "cts__design__instance__area__post_repair" : 7644.9209 ,
1717 "cts__design__instance__area__pre_repair" : 7644.9209 ,
18- "cts__design__instance__area__stdcell" : 7655.8706 ,
18+ "cts__design__instance__area__stdcell" : 7655.6665 ,
1919 "cts__design__instance__area__stdcell__post_repair" : 7644.9209 ,
2020 "cts__design__instance__area__stdcell__pre_repair" : 7644.9209 ,
21- "cts__design__instance__count" : 58196 ,
21+ "cts__design__instance__count" : 58195 ,
2222 "cts__design__instance__count__hold_buffer" : 0 ,
2323 "cts__design__instance__count__macros" : 0 ,
2424 "cts__design__instance__count__macros__post_repair" : 0 ,
2525 "cts__design__instance__count__macros__pre_repair" : 0 ,
2626 "cts__design__instance__count__post_repair" : 58143 ,
2727 "cts__design__instance__count__pre_repair" : 58143 ,
28- "cts__design__instance__count__setup_buffer" : 53 .0 ,
29- "cts__design__instance__count__stdcell" : 58196 ,
28+ "cts__design__instance__count__setup_buffer" : 52 .0 ,
29+ "cts__design__instance__count__stdcell" : 58195 ,
3030 "cts__design__instance__count__stdcell__post_repair" : 58143 ,
3131 "cts__design__instance__count__stdcell__pre_repair" : 58143 ,
32- "cts__design__instance__displacement__max" : 1.188 ,
32+ "cts__design__instance__displacement__max" : 1.415 ,
3333 "cts__design__instance__displacement__mean" : 0.0 ,
34- "cts__design__instance__displacement__total" : 57.061 ,
34+ "cts__design__instance__displacement__total" : 56.878 ,
3535 "cts__design__instance__utilization" : 0.406 ,
3636 "cts__design__instance__utilization__post_repair" : 0.4054 ,
3737 "cts__design__instance__utilization__pre_repair" : 0.4054 ,
5454 "cts__power__total" : 0.0436 ,
5555 "cts__power__total__post_repair" : 0.0436 ,
5656 "cts__power__total__pre_repair" : 0.0436 ,
57- "cts__route__wirelength__estimated" : 158567.639 ,
57+ "cts__route__wirelength__estimated" : 158507.095 ,
5858 "cts__timing__drv__hold_violation_count" : 0 ,
5959 "cts__timing__drv__hold_violation_count__post_repair" : 0 ,
6060 "cts__timing__drv__hold_violation_count__pre_repair" : 0 ,
7979 "cts__timing__drv__setup_violation_count" : 0 ,
8080 "cts__timing__drv__setup_violation_count__post_repair" : 1 ,
8181 "cts__timing__drv__setup_violation_count__pre_repair" : 1 ,
82- "cts__timing__setup__tns" : - 0.0 ,
83- "cts__timing__setup__tns__post_repair" : -15157.0596 ,
84- "cts__timing__setup__tns__pre_repair" : -15157.0596 ,
85- "cts__timing__setup__ws" : 0.66 ,
86- "cts__timing__setup__ws__post_repair" : -194.49 ,
87- "cts__timing__setup__ws__pre_repair" : -194.49 ,
88- "detailedplace__cpu__total" : 55.13 ,
82+ "cts__timing__setup__tns" : 0.0 ,
83+ "cts__timing__setup__tns__post_repair" : -14842.9502 ,
84+ "cts__timing__setup__tns__pre_repair" : -14842.9502 ,
85+ "cts__timing__setup__ws" : 3.7 ,
86+ "cts__timing__setup__ws__post_repair" : -193.84 ,
87+ "cts__timing__setup__ws__pre_repair" : -193.84 ,
88+ "detailedplace__cpu__total" : 40.63 ,
8989 "detailedplace__design__instance__area" : 7607.0566 ,
9090 "detailedplace__design__instance__area__macros" : 0.0 ,
9191 "detailedplace__design__instance__area__stdcell" : 7607.0566 ,
9999 "detailedplace__design__instance__utilization__stdcell" : 0.4034 ,
100100 "detailedplace__design__io" : 216 ,
101101 "detailedplace__design__violations" : 0 ,
102- "detailedplace__mem__peak" : 445288 .0 ,
102+ "detailedplace__mem__peak" : 443440 .0 ,
103103 "detailedplace__power__internal__total" : 0.0272 ,
104104 "detailedplace__power__leakage__total" : 0.0 ,
105105 "detailedplace__power__switching__total" : 0.0115 ,
106106 "detailedplace__power__total" : 0.0387 ,
107107 "detailedplace__route__wirelength__estimated" : 157080.276 ,
108- "detailedplace__runtime__total" : " 0:55.43 " ,
108+ "detailedplace__runtime__total" : " 0:41.13 " ,
109109 "detailedplace__timing__drv__hold_violation_count" : 0 ,
110110 "detailedplace__timing__drv__max_cap" : 0 ,
111111 "detailedplace__timing__drv__max_cap_limit" : 0.0708 ,
117117 "detailedplace__timing__setup__tns" : -13413.2002 ,
118118 "detailedplace__timing__setup__ws" : -185.85 ,
119119 "detailedroute__route__drc_errors" : 0 ,
120- "detailedroute__route__drc_errors__iter:1" : 42284 ,
121- "detailedroute__route__drc_errors__iter:10" : 2 ,
122- "detailedroute__route__drc_errors__iter:11" : 2 ,
123- "detailedroute__route__drc_errors__iter:12" : 2 ,
124- "detailedroute__route__drc_errors__iter:13" : 2 ,
125- "detailedroute__route__drc_errors__iter:14" : 1 ,
126- "detailedroute__route__drc_errors__iter:15" : 1 ,
127- "detailedroute__route__drc_errors__iter:16" : 0 ,
128- "detailedroute__route__drc_errors__iter:2" : 16000 ,
129- "detailedroute__route__drc_errors__iter:3" : 15182 ,
130- "detailedroute__route__drc_errors__iter:4" : 127 ,
131- "detailedroute__route__drc_errors__iter:5" : 21 ,
132- "detailedroute__route__drc_errors__iter:6" : 7 ,
133- "detailedroute__route__drc_errors__iter:7" : 3 ,
134- "detailedroute__route__drc_errors__iter:8" : 2 ,
135- "detailedroute__route__drc_errors__iter:9" : 1 ,
136- "detailedroute__route__net" : 56301 ,
120+ "detailedroute__route__drc_errors__iter:1" : 42454 ,
121+ "detailedroute__route__drc_errors__iter:2" : 15928 ,
122+ "detailedroute__route__drc_errors__iter:3" : 15023 ,
123+ "detailedroute__route__drc_errors__iter:4" : 70 ,
124+ "detailedroute__route__drc_errors__iter:5" : 9 ,
125+ "detailedroute__route__drc_errors__iter:6" : 0 ,
126+ "detailedroute__route__net" : 56300 ,
137127 "detailedroute__route__net__special" : 2 ,
138- "detailedroute__route__vias" : 519615 ,
128+ "detailedroute__route__vias" : 519171 ,
139129 "detailedroute__route__vias__multicut" : 0 ,
140- "detailedroute__route__vias__singlecut" : 519615 ,
141- "detailedroute__route__wirelength" : 221154 ,
142- "detailedroute__route__wirelength__iter:1" : 223234 ,
143- "detailedroute__route__wirelength__iter:10" : 221154 ,
144- "detailedroute__route__wirelength__iter:11" : 221154 ,
145- "detailedroute__route__wirelength__iter:12" : 221154 ,
146- "detailedroute__route__wirelength__iter:13" : 221154 ,
147- "detailedroute__route__wirelength__iter:14" : 221154 ,
148- "detailedroute__route__wirelength__iter:15" : 221154 ,
149- "detailedroute__route__wirelength__iter:16" : 221154 ,
150- "detailedroute__route__wirelength__iter:2" : 221716 ,
151- "detailedroute__route__wirelength__iter:3" : 221169 ,
152- "detailedroute__route__wirelength__iter:4" : 221157 ,
153- "detailedroute__route__wirelength__iter:5" : 221155 ,
154- "detailedroute__route__wirelength__iter:6" : 221153 ,
155- "detailedroute__route__wirelength__iter:7" : 221152 ,
156- "detailedroute__route__wirelength__iter:8" : 221153 ,
157- "detailedroute__route__wirelength__iter:9" : 221153 ,
158- "finish__clock__skew__hold" : 180.3329 ,
159- "finish__clock__skew__setup" : 180.9988 ,
160- "finish__cpu__total" : 154.89 ,
161- "finish__design__instance__area" : 7655.8706 ,
130+ "detailedroute__route__vias__singlecut" : 519171 ,
131+ "detailedroute__route__wirelength" : 221065 ,
132+ "detailedroute__route__wirelength__iter:1" : 223225 ,
133+ "detailedroute__route__wirelength__iter:2" : 221688 ,
134+ "detailedroute__route__wirelength__iter:3" : 221082 ,
135+ "detailedroute__route__wirelength__iter:4" : 221073 ,
136+ "detailedroute__route__wirelength__iter:5" : 221070 ,
137+ "detailedroute__route__wirelength__iter:6" : 221065 ,
138+ "finish__clock__skew__hold" : 171.7153 ,
139+ "finish__clock__skew__setup" : 172.3766 ,
140+ "finish__cpu__total" : 122.36 ,
141+ "finish__design__instance__area" : 7655.6665 ,
162142 "finish__design__instance__area__macros" : 0.0 ,
163- "finish__design__instance__area__stdcell" : 7655.8706 ,
164- "finish__design__instance__count" : 58196 ,
143+ "finish__design__instance__area__stdcell" : 7655.6665 ,
144+ "finish__design__instance__count" : 58195 ,
165145 "finish__design__instance__count__macros" : 0 ,
166- "finish__design__instance__count__stdcell" : 58196 ,
146+ "finish__design__instance__count__stdcell" : 58195 ,
167147 "finish__design__instance__utilization" : 0.406 ,
168148 "finish__design__instance__utilization__stdcell" : 0.406 ,
169149 "finish__design__io" : 216 ,
170- "finish__mem__peak" : 4284424 .0 ,
150+ "finish__mem__peak" : 4303420 .0 ,
171151 "finish__power__internal__total" : 0.0279 ,
172152 "finish__power__leakage__total" : 0.0 ,
173153 "finish__power__switching__total" : 0.0167 ,
174154 "finish__power__total" : 0.0446 ,
175- "finish__runtime__total" : " 2:37.49 " ,
155+ "finish__runtime__total" : " 2:08.96 " ,
176156 "finish__timing__drv__hold_violation_count" : 0.0 ,
177157 "finish__timing__drv__max_cap" : 0 ,
178- "finish__timing__drv__max_cap_limit" : 0.0258 ,
158+ "finish__timing__drv__max_cap_limit" : 0.0326 ,
179159 "finish__timing__drv__max_fanout" : 0 ,
180160 "finish__timing__drv__max_fanout_limit" : 1.0000000150474662e+30 ,
181- "finish__timing__drv__max_slew" : 469 ,
182- "finish__timing__drv__max_slew_limit" : -1.0243 ,
161+ "finish__timing__drv__max_slew" : 515 ,
162+ "finish__timing__drv__max_slew_limit" : -0.8056 ,
183163 "finish__timing__drv__setup_violation_count" : 1.0 ,
184- "finish__timing__setup__tns" : -20429.9395 ,
185- "finish__timing__setup__ws" : -206.87 ,
186- "finish__timing__wns_percent_delay" : -15.258053 ,
187- "floorplan__cpu__total" : 2.46 ,
164+ "finish__timing__setup__tns" : -21364.6602 ,
165+ "finish__timing__setup__ws" : -198.63 ,
166+ "finish__timing__wns_percent_delay" : -14.689204 ,
167+ "floorplan__cpu__total" : 1.92 ,
188168 "floorplan__design__instance__area" : 7046.9805 ,
189169 "floorplan__design__instance__area__macros" : 0.0 ,
190170 "floorplan__design__instance__area__stdcell" : 7046.9805 ,
194174 "floorplan__design__instance__utilization" : 0.3737 ,
195175 "floorplan__design__instance__utilization__stdcell" : 0.3737 ,
196176 "floorplan__design__io" : 216 ,
197- "floorplan__mem__peak" : 236004 .0 ,
177+ "floorplan__mem__peak" : 234240 .0 ,
198178 "floorplan__power__internal__total" : 0.0662 ,
199179 "floorplan__power__leakage__total" : 0.0 ,
200180 "floorplan__power__switching__total" : 0.008 ,
201181 "floorplan__power__total" : 0.0742 ,
202- "floorplan__runtime__total" : " 0:02.60 " ,
182+ "floorplan__runtime__total" : " 0:02.12 " ,
203183 "floorplan__timing__setup__tns" : -11511218.0 ,
204184 "floorplan__timing__setup__ws" : -62963.3789 ,
205185 "globalplace__design__instance__area" : 7113.7861 ,
217197 "globalplace__power__total" : 0.1028 ,
218198 "globalplace__timing__setup__tns" : -22396626.0 ,
219199 "globalplace__timing__setup__ws" : -121147.0234 ,
220- "globalroute__clock__skew__hold" : 154.7604 ,
221- "globalroute__clock__skew__setup" : 154.7604 ,
222- "globalroute__design__instance__area" : 7655.8706 ,
200+ "globalroute__clock__skew__hold" : 139.9998 ,
201+ "globalroute__clock__skew__setup" : 139.9998 ,
202+ "globalroute__design__instance__area" : 7655.6665 ,
223203 "globalroute__design__instance__area__macros" : 0.0 ,
224- "globalroute__design__instance__area__stdcell" : 7655.8706 ,
225- "globalroute__design__instance__count" : 58196 ,
204+ "globalroute__design__instance__area__stdcell" : 7655.6665 ,
205+ "globalroute__design__instance__count" : 58195 ,
226206 "globalroute__design__instance__count__macros" : 0 ,
227- "globalroute__design__instance__count__stdcell" : 58196 ,
207+ "globalroute__design__instance__count__stdcell" : 58195 ,
228208 "globalroute__design__instance__utilization" : 0.406 ,
229209 "globalroute__design__instance__utilization__stdcell" : 0.406 ,
230210 "globalroute__design__io" : 216 ,
231211 "globalroute__power__internal__total" : 0.0278 ,
232212 "globalroute__power__leakage__total" : 0.0 ,
233213 "globalroute__power__switching__total" : 0.017 ,
234214 "globalroute__power__total" : 0.0447 ,
235- "globalroute__timing__clock__slack" : -103.711 ,
215+ "globalroute__timing__clock__slack" : -103.294 ,
236216 "globalroute__timing__drv__hold_violation_count" : 0 ,
237217 "globalroute__timing__drv__max_cap" : 0 ,
238218 "globalroute__timing__drv__max_cap_limit" : 0.0396 ,
241221 "globalroute__timing__drv__max_slew" : 189 ,
242222 "globalroute__timing__drv__max_slew_limit" : -0.4229 ,
243223 "globalroute__timing__drv__setup_violation_count" : 1 ,
244- "globalroute__timing__setup__tns" : -9006.0098 ,
245- "globalroute__timing__setup__ws" : -103.71 ,
246- "placeopt__cpu__total" : 42.02 ,
224+ "globalroute__timing__setup__tns" : -9093.5596 ,
225+ "globalroute__timing__setup__ws" : -103.29 ,
226+ "placeopt__cpu__total" : 30.72 ,
247227 "placeopt__design__instance__area" : 7607.0566 ,
248228 "placeopt__design__instance__area__macros" : 0.0 ,
249229 "placeopt__design__instance__area__macros__pre_opt" : 0.0 ,
262242 "placeopt__design__instance__utilization__stdcell__pre_opt" : 0.3772 ,
263243 "placeopt__design__io" : 216 ,
264244 "placeopt__design__io__pre_opt" : 216 ,
265- "placeopt__mem__peak" : 419216 .0 ,
245+ "placeopt__mem__peak" : 417264 .0 ,
266246 "placeopt__power__internal__total" : 0.0256 ,
267247 "placeopt__power__internal__total__pre_opt" : 0.092 ,
268248 "placeopt__power__leakage__total" : 0.0 ,
271251 "placeopt__power__switching__total__pre_opt" : 0.0107 ,
272252 "placeopt__power__total" : 0.0335 ,
273253 "placeopt__power__total__pre_opt" : 0.1027 ,
274- "placeopt__runtime__total" : " 0:42.27 " ,
254+ "placeopt__runtime__total" : " 0:31.38 " ,
275255 "placeopt__timing__drv__hold_violation_count" : 0 ,
276256 "placeopt__timing__drv__max_cap" : 0 ,
277257 "placeopt__timing__drv__max_cap_limit" : 0.0708 ,
285265 "placeopt__timing__setup__ws" : -217.18 ,
286266 "placeopt__timing__setup__ws__pre_opt" : -121147.0234 ,
287267 "run__flow__design" : " ethmac" ,
288- "run__flow__generate_date" : " 2022-12-15 08:32 " ,
268+ "run__flow__generate_date" : " 2022-12-15 13:54 " ,
289269 "run__flow__metrics_version" : " Metrics_2.1.2" ,
290270 "run__flow__openroad_commit" : " N/A" ,
291- "run__flow__openroad_version" : " v2.0-6059-gdb7488858 " ,
271+ "run__flow__openroad_version" : " v2.0-6095-g463e7dda9 " ,
292272 "run__flow__platform" : " asap7" ,
293273 "run__flow__platform__capacitance_units" : " 1fF" ,
294274 "run__flow__platform__current_units" : " 1mA" ,
297277 "run__flow__platform__resistance_units" : " 1kohm" ,
298278 "run__flow__platform__time_units" : " 1ps" ,
299279 "run__flow__platform__voltage_units" : " 1v" ,
300- "run__flow__platform_commit" : " fa7b392c4df79b65a466bc0bff9c22d4004a1a62 " ,
301- "run__flow__scripts_commit" : " fa7b392c4df79b65a466bc0bff9c22d4004a1a62 " ,
302- "run__flow__uuid" : " 5aa4525c-656a-451d-9ec4-b3a63d0f2c53 " ,
280+ "run__flow__platform_commit" : " 154de09d1429682da51ea68f8d05d2624a99b78d " ,
281+ "run__flow__scripts_commit" : " 154de09d1429682da51ea68f8d05d2624a99b78d " ,
282+ "run__flow__uuid" : " e448f6b4-71d6-40b0-8d06-27d1fb3ecb3d " ,
303283 "run__flow__variant" : " base" ,
304- "synth__cpu__total" : 94.65 ,
284+ "synth__cpu__total" : 65.85 ,
305285 "synth__design__instance__area__stdcell" : 7567.749 ,
306286 "synth__design__instance__count__stdcell" : 59013.0 ,
307- "synth__mem__peak" : 356820 .0 ,
308- "synth__runtime__total" : " 1:37.84 " ,
309- "total_time" : " 0:05:55.630000 "
287+ "synth__mem__peak" : 354780 .0 ,
288+ "synth__runtime__total" : " 1:08.74 " ,
289+ "total_time" : " 0:04:32.330000 "
310290}
0 commit comments