mock-array-big: use settings.mk

Signed-off-by: Øyvind Harboe <[email protected]>

Author: oharboe

flow/designs/asap7/mock-array-big/Element/config.mk

@@ -1,3 +1,5 @@
+include designs/asap7/mock-array-big/defaults.mk
+
 export DESIGN_NAME = Element
 export DESIGN_NICKNAME = mock-array-big_Element
 
@@ -10,8 +12,8 @@ export PLACE_DENSITY          = 0.50
 export GPL_TIMING_DRIVEN      = 0
 export GPL_ROUTABILITY_DRIVEN = 0
 
-export CORE_AREA = $(shell python3 designs/asap7/mock-array-big/ce_core_area.py)
-export DIE_AREA = $(shell python3 designs/asap7/mock-array-big/ce_die_area.py)
+export CORE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/ce_core_area.py)
+export DIE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/ce_die_area.py)
 
 export IO_CONSTRAINTS = designs/asap7/mock-array-big/Element/io.tcl
 
@@ -20,3 +22,5 @@ export PDN_TCL = designs/asap7/mock-array-big/Element/pdn.tcl
 # max routing layer need to be set to M5, since M6 is needed for next level up to connect
 # to the ring and stipe
 export MAX_ROUTING_LAYER = M5
+
+export PRIVATE_DIR=designs/asap7/mock-array-big

flow/designs/asap7/mock-array-big/README.md

@@ -6,7 +6,30 @@ interesting test-cases.
 
 By default, the array is 8x8 elements and has an 8 bit datapath.
 
-To create a 4x4 element array with 4 bit datapath, run:
+To create a 4x4 element array with 4 bit datapath, first create a settings.mk file:
 
-    MOCK_ARRAY_WIDTH=4 MOCK_ARRAY_HEIGHT=4 MOCK_ARRAY_DATAWIDTH=4 ./configure.sh
-    MOCK_ARRAY_WIDTH=4 MOCK_ARRAY_HEIGHT=4 MOCK_ARRAY_DATAWIDTH=4 make DESIGN_CONFIG=designs/asap7/mock-array-big/config.mk
+```
+export MOCK_ARRAY_WIDTH=4
+export MOCK_ARRAY_HEIGHT=4
+export MOCK_ARRAY_DATAWIDTH=4
+export FLOW_VARIANT=small
+# use a different folder for each combination of parameters
+#export MOCK_ARRAY_WIDTH=16
+#export MOCK_ARRAY_HEIGHT=16
+#export MOCK_ARRAY_DATAWIDTH=64
+#export FLOW_VARIANT=giant
+export DESIGN_CONFIG=designs/asap7/mock-array-big/config.mk
+```
+
+Now run configure, which a custom target in mock-array-big, that runs Chisel to
+regenerate the Verilog code for the above configuration:
+
+```
+make verilog
+```
+
+Now build the design as usual:
+
+```
+make
+```

flow/designs/asap7/mock-array-big/config.mk

@@ -1,3 +1,5 @@
+include designs/asap7/mock-array-big/defaults.mk
+
 export DESIGN_NAME = MockArray
 export DESIGN_NICKNAME = mock-array-big
 
@@ -10,8 +12,8 @@ export PLATFORM               = asap7
 
 export PLACE_DENSITY          = 0.30
 
-export CORE_AREA = $(shell python3 designs/asap7/mock-array-big/core_area.py)
-export DIE_AREA = $(shell python3 designs/asap7/mock-array-big/die_area.py)
+export CORE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/core_area.py)
+export DIE_AREA = $(shell export MOCK_ARRAY_HEIGHT=$(MOCK_ARRAY_HEIGHT) && export MOCK_ARRAY_WIDTH=$(MOCK_ARRAY_WIDTH) && export MOCK_ARRAY_PITCH_SCALE=$(MOCK_ARRAY_PITCH_SCALE) && python3 designs/asap7/mock-array-big/die_area.py)
 
 BLOCKS = Element
 
@@ -23,3 +25,5 @@ export IO_CONSTRAINTS = designs/asap7/mock-array-big/io.tcl
 
 export PDN_TCL = designs/asap7/mock-array-big/pdn.tcl
 export TNS_END_PERCENT       ?= 100
+
+export PRIVATE_DIR=designs/asap7/mock-array-big

flow/designs/asap7/mock-array-big/config.py

@@ -1,11 +1,11 @@
 import os
 
 # number of Elements in row and column, user can set via environment variable
-rows = int(os.environ.get("MOCK_ARRAY_HEIGHT", "8"))
-cols = int(os.environ.get("MOCK_ARRAY_WIDTH", "8"))
+rows = int(os.environ.get("MOCK_ARRAY_HEIGHT"))
+cols = int(os.environ.get("MOCK_ARRAY_WIDTH"))
 
 # Element placement pitch can be control by user
-pitch_scale = int(os.environ.get("MOCK_ARRAY_PITCH_SCALE", "2"))
+pitch_scale = int(os.environ.get("MOCK_ARRAY_PITCH_SCALE"))
 
 if pitch_scale < 1:
   raise Exception("Element placement pitch must be greater than 1")

flow/designs/asap7/mock-array-big/defaults.mk

@@ -0,0 +1,5 @@
+# single source of truth for defaults.
+export MOCK_ARRAY_WIDTH ?= 8
+export MOCK_ARRAY_HEIGHT ?= 8
+export MOCK_ARRAY_DATAWIDTH ?= 8
+export MOCK_ARRAY_PITCH_SCALE ?= 2

flow/designs/asap7/mock-array-big/private.mk

@@ -0,0 +1,3 @@
+.PHONY: verilog
+verilog:
+	designs/asap7/mock-array-big/verilog.sh

…esigns/asap7/mock-array-big/configure.sh …/designs/asap7/mock-array-big/verilog.shflow/designs/asap7/mock-array-big/configure.sh renamed to flow/designs/asap7/mock-array-big/verilog.sh flow/designs/asap7/mock-array-big/configure.sh renamed to flow/designs/asap7/mock-array-big/verilog.sh

@@ -10,7 +10,7 @@ cd $DIR
 cd ../../src/mock-array-big
 
 sbt -Duser.home="$HOME" -Djline.terminal=jline.UnsupportedTerminal -batch \
-     "test:runMain GenerateMockArray --width ${MOCK_ARRAY_WIDTH:-8} --height ${MOCK_ARRAY_HEIGHT:-8} --dataWidth ${MOCK_ARRAY_DATAWIDTH:-8} -- --emit-modules verilog --emission-options disableMemRandomization,disableRegisterRandomization --target-dir ."
+     "test:runMain GenerateMockArray --width ${MOCK_ARRAY_WIDTH} --height ${MOCK_ARRAY_HEIGHT} --dataWidth ${MOCK_ARRAY_DATAWIDTH} -- --emit-modules verilog --emission-options disableMemRandomization,disableRegisterRandomization --target-dir ."
 
 # reduce git noise as these comments will change if the line numbers in MockArray.scala changes
 find . -name "*.v" -type f -exec sed -i 's/ \/\/.*$//' {} \;