Modify - relaxing clock period to get thru the flow

louiic · louiic · commit 12deaa1722af · 2023-07-13T07:12:01.000-07:00
Signed-off-by: louiic &lt;pchaiyakul@ucsd.edu&gt;
diff --git a/flow/designs/asap7/megaboom/constraint.sdc b/flow/designs/asap7/megaboom/constraint.sdc
@@ -1,6 +1,6 @@
 set clk_name      clock
 set clk_port_name clock
-set clk_period    5000 
+set clk_period    7500 
 set clk_io_pct    0.2
 
 set clk_port      [get_ports $clk_port_name]
