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2 parents 9ebd02d + 31eea54 commit 13ae38dCopy full SHA for 13ae38d
flow/designs/gf180/uart-blocks/config.mk
@@ -6,6 +6,8 @@ export DESIGN_NICKNAME = uart-blocks
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export VERILOG_FILES = ./designs/src/uart-no-param/*.v
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export SDC_FILE = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
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+export SYNTH_HIERARCHICAL = 1
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+export RTLMP_FLOW = True
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export BLOCKS = uart_rx
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export DIE_AREA = 0 0 430 430
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