Merge pull request #2978 from Pinata-Consulting/makefile-yosys-flags

makefile: YOSYS_FLAGS defaults defined in variables.yaml

Author: maliberty

docs/user/FlowVariables.md

@@ -196,7 +196,7 @@ configuration file.
 | <a name="VERILOG_FILES"></a>VERILOG_FILES| The path to the design Verilog files or JSON files providing a description of modules (check `yosys -h write_json` for more details).| | |
 | <a name="VERILOG_INCLUDE_DIRS"></a>VERILOG_INCLUDE_DIRS| Specifies the include directories for the Verilog input files.| | |
 | <a name="VERILOG_TOP_PARAMS"></a>VERILOG_TOP_PARAMS| Apply toplevel params (if exist).| | |
-| <a name="YOSYS_FLAGS"></a>YOSYS_FLAGS| Additional flags to pass to yosys.| | |
+| <a name="YOSYS_FLAGS"></a>YOSYS_FLAGS| Flags to pass to yosys.| -v 3| |
 ## synth variables
 
 - [ABC_AREA](#ABC_AREA)

flow/Makefile

@@ -207,8 +207,6 @@ ifeq (,$(strip $(NUM_CORES)))
 endif
 export NUM_CORES
 
-YOSYS_FLAGS += -v 3
-
 #-------------------------------------------------------------------------------
 # setup all commands used within this flow
 export TIME_BIN   ?= env time

flow/scripts/variables.yaml

@@ -913,9 +913,10 @@ RUN_LOG_NAME_STEM:
   default: run
 YOSYS_FLAGS:
   description: >
-    Additional flags to pass to yosys.
+    Flags to pass to yosys.
   stages:
     - synth
+  default: -v 3
 FLOW_VARIANT:
   description: >
     Flow variant to use, used in the flow variant directory name.