Merge pull request #1957 from The-OpenROAD-Project-staging/asap7-pdn-halo

asap7: set a 2um pdn halo on the macros

Author: maliberty

flow/designs/asap7/mock-array/BLOCKS_grid_strategy.tcl

@@ -0,0 +1,37 @@
+# Top level PDN for macros using BLOCK_grid_strategy.tcl
+
+####################################
+# global connections
+####################################
+add_global_connection -net {VDD} -inst_pattern {.*} -pin_pattern {^VDD$} -power
+add_global_connection -net {VSS} -inst_pattern {.*} -pin_pattern {^VSS$} -ground
+
+####################################
+# voltage domains
+####################################
+set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
+
+####################################
+# standard cell grid
+####################################
+define_pdn_grid -name {top} -voltage_domains {CORE}
+add_pdn_stripe -grid {top} -layer {M1} -width {0.018} -pitch {0.54} -offset {0} -followpins
+add_pdn_stripe -grid {top} -layer {M2} -width {0.018} -pitch {0.54} -offset {0} -followpins
+add_pdn_ring   -grid {top} -layers {M5 M6} -widths {0.504 0.544} -spacings {0.096} -core_offset {0.504}
+
+add_pdn_stripe -grid {top} -layer {M5} -width {0.12}  -spacing {0.072} -pitch {2.16} -offset {1.50} -extend_to_core_ring
+add_pdn_stripe -grid {top} -layer {M6} -width {0.288} -spacing {0.096} -pitch {4.32} -offset {1.504} -extend_to_core_ring
+
+add_pdn_connect -grid {top} -layers {M1 M2}
+add_pdn_connect -grid {top} -layers {M2 M5}
+add_pdn_connect -grid {top} -layers {M5 M6}
+
+####################################
+# Element grid
+####################################
+# The halo around the macro prevents pdn from blocking pin access
+define_pdn_grid -macro -cells $::env(MACROS) \
+    -halo "$::env(MACRO_HALO_X) $::env(MACRO_HALO_Y)" \
+    -voltage_domains {CORE} -name ElementGrid
+
+add_pdn_connect -grid {ElementGrid} -layers {M5 M6}

flow/designs/asap7/mock-array/config.mk

@@ -28,7 +28,7 @@ export BLOCKS                ?= Element
 ifneq ($(BLOCKS),)
   export GDS_ALLOW_EMPTY       = Element
   export MACRO_PLACEMENT_TCL   = ./designs/asap7/mock-array/macro-placement.tcl
-  export PDN_TCL               = $(FLOW_HOME)/platforms/asap7/openRoad/pdn/BLOCKS_grid_strategy.tcl
+  export PDN_TCL               = designs/asap7/mock-array/BLOCKS_grid_strategy.tcl
 endif
 
 export IO_CONSTRAINTS        = designs/asap7/mock-array/io.tcl

flow/platforms/asap7/openRoad/pdn/BLOCKS_grid_strategy.tcl

@@ -30,6 +30,6 @@ add_pdn_connect -grid {top} -layers {M5 M6}
 # Element grid
 ####################################
 # The halo around the macro prevents pdn from blocking pin access
-define_pdn_grid -macro -cells $::env(MACROS) -halo "0.25 0.25 0.25 0.25" -voltage_domains {CORE} -name ElementGrid
+define_pdn_grid -macro -cells $::env(MACROS) -halo "2.0 2.0 2.0 2.0" -voltage_domains {CORE} -name ElementGrid
 
 add_pdn_connect -grid {ElementGrid} -layers {M5 M6}

flow/platforms/asap7/openRoad/pdn/grid_strategy-M1-M2-M5-M6.tcl

@@ -28,10 +28,10 @@ add_pdn_connect -grid {top} -layers {M5 M6}
 ####################################
 # grid for: CORE_macro_grid_1
 ####################################
-define_pdn_grid -name {CORE_macro_grid_1} -voltage_domains {CORE} -macro -orient {R0 R180 MX MY} -cells {.*}
+define_pdn_grid -name {CORE_macro_grid_1} -voltage_domains {CORE} -macro -orient {R0 R180 MX MY} -halo {2.0 2.0 2.0 2.0} -cells {.*}
 add_pdn_connect -grid {CORE_macro_grid_1} -layers {M4 M5}
 ####################################
 # grid for: CORE_macro_grid_2
 ####################################
-define_pdn_grid -name {CORE_macro_grid_2} -voltage_domains {CORE} -macro -orient {R90 R270 MXR90 MYR90} -cells {.*}
+define_pdn_grid -name {CORE_macro_grid_2} -voltage_domains {CORE} -macro -orient {R90 R270 MXR90 MYR90} -halo {2.0 2.0 2.0 2.0} -cells {.*}
 add_pdn_connect -grid {CORE_macro_grid_2} -layers {M4 M5}