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eder-matheuseder-matheus
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Merge branch 'master' into secure-yosys0.41
Signed-off-by: Eder Monteiro <[email protected]>
2 parents df2500f + 322f920 commit 22fb280

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‎.dockerignore‎

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@@ -31,6 +31,3 @@ core*
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# git
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.git
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.gitignore
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# local dependencies
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dependencies/

‎flow/Makefile‎

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@@ -200,6 +200,10 @@ export FLOW_VARIANT ?= base
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export GPL_TIMING_DRIVEN ?= 1
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export GPL_ROUTABILITY_DRIVEN ?= 1
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# Cell padding in SITE widths to ease rout-ability. Applied to both sides
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export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT ?= 0
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export CELL_PAD_IN_SITES_DETAIL_PLACEMENT ?= 0
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export ENABLE_DPO ?= 1
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export DPO_MAX_DISPLACEMENT ?= 5 1
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‎flow/designs/asap7/swerv_wrapper/config.mk‎

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@@ -23,9 +23,6 @@ export PLACE_PINS_ARGS = -exclude left:* -exclude right:*
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export PLACE_DENSITY_LB_ADDON = 0.20
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export CTS_BUF_CELL = BUFx8_ASAP7_75t_R
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export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT = 0
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export CELL_PAD_IN_SITES_DETAIL_PLACEMENT = 0
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export FASTROUTE_TCL = ./designs/$(PLATFORM)/swerv_wrapper/fastroute.tcl
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#Temporary until sta bug is fixed

‎flow/designs/tsmc65lp/ariane/metadata-base-ok.json‎

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‎flow/designs/tsmc65lp/ariane/rules-base.json‎

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"compare": "<="
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},
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"finish__timing__setup__ws": {
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"value": -1.06,
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"value": -1.8,
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"compare": ">="
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},
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"finish__design__instance__area": {
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"compare": "<="
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},
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"finish__timing__drv__hold_violation_count": {
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"value": 681,
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"value": 100,
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"compare": "<="
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},
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"finish__timing__wns_percent_delay": {
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"value": -11.01,
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"value": -26.97,
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"compare": ">="
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}
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}

‎flow/designs/tsmc65lp/bp_be_top/rules-base.json‎

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{
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"synth__design__instance__area__stdcell": {
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"value": 577528.06,
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"value": 573320.16,
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"compare": "<="
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},
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"constraints__clocks__count": {

‎flow/platforms/asap7/config.mk‎

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@@ -126,18 +126,11 @@ export MACRO_PLACE_CHANNEL ?= 12 12
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export MACRO_HALO_X ?= 2
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export MACRO_HALO_Y ?= 2
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# Cell padding in SITE widths to ease rout-ability. Applied to both sides
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export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT ?= 0
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export CELL_PAD_IN_SITES_DETAIL_PLACEMENT ?= 0
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export PLACE_DENSITY ?= 0.60
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# Endcap and Welltie cells
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export TAPCELL_TCL = $(PLATFORM_DIR)/openRoad/tapcell.tcl
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# TritonCTS options
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export CTS_BUF_CELL ?= BUFx4_ASAP7_75t_R
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# Fill cells used in fill cell insertion
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export FILL_CELLS = FILLERxp5_ASAP7_75t_R \
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FILLER_ASAP7_75t_R \
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export ABC_DRIVER_CELL = BUFx2_ASAP7_75t_L
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export CTS_BUF_CELL = BUFx4_ASAP7_75t_L
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export FILL_CELLS = "FILLERxp5_ASAP7_75t_L"
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export TAP_CELL_NAME = TAPCELL_ASAP7_75t_L
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export ABC_DRIVER_CELL = BUFx2_ASAP7_75t_SL
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export CTS_BUF_CELL = BUFx4_ASAP7_75t_SL
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export FILL_CELLS = "FILLERxp5_ASAP7_75t_SL"
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export TAP_CELL_NAME = TAPCELL_ASAP7_75t_SL

‎flow/platforms/gf180/config.mk‎

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#---------------------------------------------------------
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# Place
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#--------------------------------------------------------
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# Cell padding in SITE widths to ease rout-ability. Applied to both sides
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export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT ?= 0
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export CELL_PAD_IN_SITES_DETAIL_PLACEMENT ?= 0
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# global placement density
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export PLACE_DENSITY ?= 0.40
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#--------------------------------------------------------
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# CTS
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#--------------------------------------------------------
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export CTS_BUF_CELL = gf180mcu_fd_sc_mcu$(TRACK_OPTION)$(POWER_OPTION)__clkbuf_8
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#---------------------------------------------------------
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# Route
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#---------------------------------------------------------

‎flow/platforms/ihp-sg13g2/config.mk‎

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#---------------------------------------------------------
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# Place
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# --------------------------------------------------------
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# default cell padding for cells
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export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT ?= 0
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export CELL_PAD_IN_SITES_DETAIL_PLACEMENT ?= 0
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export PLACE_DENSITY ?= 0.65
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# --------------------------------------------------------
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# CTS
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# -------------------------------------------------------
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# TritonCTS options
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export CTS_BUF_CELL ?= sg13g2_buf_2
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# ---------------------------------------------------------
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# Route
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# ---------------------------------------------------------

‎flow/platforms/nangate45/config.mk‎

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#---------------------------------------------------------
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# Place
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# --------------------------------------------------------
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# Cell padding in SITE widths to ease rout-ability. Applied to both sides
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export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT ?= 0
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export CELL_PAD_IN_SITES_DETAIL_PLACEMENT ?= 0
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#
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export PLACE_DENSITY ?= 0.30
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# --------------------------------------------------------
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# CTS
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# -------------------------------------------------------
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# TritonCTS options
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export CTS_BUF_CELL ?= BUF_X4
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# ---------------------------------------------------------
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# Route
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# ---------------------------------------------------------

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