mock-array: reduce clock period to 2000ps from 8000ps

still positive slack, but reducing to 1000ps, detailed
placement fails to place hold cells.

Signed-off-by: Øyvind Harboe <[email protected]>

Author: oharboe

flow/designs/asap7/mock-array/Element/constraints.sdc

@@ -4,7 +4,7 @@ set cols [expr {[info exists ::env(MOCK_ARRAY_COLS)] ? $::env(MOCK_ARRAY_COLS) :
 
 set clk_name clock
 set clk_port_name clock
-set clk_period 8000
+set clk_period 2000
 
 set clk_port [get_ports $clk_port_name]
 create_clock -period $clk_period -waveform [list 0 [expr $clk_period / 2]] -name $clk_name $clk_port

flow/designs/asap7/mock-array/constraints.sdc

@@ -1,6 +1,6 @@
 set sdc_version 2.0
 
-set clk_period 8000
+set clk_period 2000
 create_clock [get_ports clock] -period $clk_period -waveform [list 0 [expr $clk_period/2]]
 
 set clk_name  clock