make description less ambiguous and fix typo

Signed-off-by: Arthur Koucher <[email protected]>

Author: AcKoucher

docs/user/FlowVariables.md

@@ -111,13 +111,13 @@ configuration file.
 | <a name="KLAYOUT_TECH_FILE"></a>KLAYOUT_TECH_FILE| A mapping from LEF/DEF to GDS using the KLayout tool.| | |
 | <a name="LATCH_MAP_FILE"></a>LATCH_MAP_FILE| List of latches treated as a black box by Yosys.| | |
 | <a name="LIB_FILES"></a>LIB_FILES| A Liberty file of the standard cell library with PVT characterization, input and output characteristics, timing and power definitions for each cell.| | |
-| <a name="MACRO_BLOCKAGE_HALO"></a>MACRO_BLOCKAGE_HALO| Distance beyond the edges of a macro that will be covered by a blockage. Note that the default macro blockage halo comes from the largest of the specified MACRO_PLACE_HALO x or y values. This variable overrides that calculation.| | |
+| <a name="MACRO_BLOCKAGE_HALO"></a>MACRO_BLOCKAGE_HALO| Distance beyond the edges of a macro that will also be covered by the blockage generated for that macro. Note that the default macro blockage halo comes from the largest of the specified MACRO_PLACE_HALO x or y values. This variable overrides that calculation.| | |
 | <a name="MACRO_EXTENSION"></a>MACRO_EXTENSION| Sets the number of GCells added to the blockages boundaries from macros.| | |
 | <a name="MACRO_PLACEMENT"></a>MACRO_PLACEMENT| Specifies the path of a file on how to place certain macros manually using read_macro_placement.| | |
 | <a name="MACRO_PLACEMENT_TCL"></a>MACRO_PLACEMENT_TCL| Specifies the path of a TCL file on how to place certain macros manually.| | |
 | <a name="MACRO_PLACE_HALO"></a>MACRO_PLACE_HALO| Horizontal/vertical halo around macros (microns). Used by automatic macro placement.| | |
-| <a name="MACRO_ROWS_HALO_X"></a>MACRO_ROWS_HALO_X| Horizontal distance between the edge of the macro and the begining of the rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks design.| | |
-| <a name="MACRO_ROWS_HALO_Y"></a>MACRO_ROWS_HALO_Y| Vertical distance between the edge of the macro and the begining of the rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks design.| | |
+| <a name="MACRO_ROWS_HALO_X"></a>MACRO_ROWS_HALO_X| Horizontal distance between the edge of the macro and the beginning of the rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks design.| | |
+| <a name="MACRO_ROWS_HALO_Y"></a>MACRO_ROWS_HALO_Y| Vertical distance between the edge of the macro and the beginning of the rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks design.| | |
 | <a name="MACRO_WRAPPERS"></a>MACRO_WRAPPERS| The wrapper file that replaces existing macros with their wrapped version.| | |
 | <a name="MAKE_TRACKS"></a>MAKE_TRACKS| Tcl file that defines add routing tracks to a floorplan.| | |
 | <a name="MATCH_CELL_FOOTPRINT"></a>MATCH_CELL_FOOTPRINT| Enforce sizing operations to only swap cells that have the same layout boundary.| 0| |

flow/scripts/variables.yaml

@@ -271,7 +271,8 @@ MACRO_PLACE_HALO:
     - floorplan
 MACRO_BLOCKAGE_HALO:
   description: >
-    Distance beyond the edges of a macro that will be covered by a blockage.
+    Distance beyond the edges of a macro that will also be covered by the
+    blockage generated for that macro.
 
     Note that the default macro blockage halo comes from the largest of the
     specified MACRO_PLACE_HALO x or y values. This variable overrides that
@@ -676,14 +677,14 @@ RESYNTH_TIMING_RECOVER:
   default: 0
 MACRO_ROWS_HALO_X:
   description: >
-    Horizontal distance between the edge of the macro and the begining of the
+    Horizontal distance between the edge of the macro and the beginning of the
     rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks
     design.
   stages:
     - floorplan
 MACRO_ROWS_HALO_Y:
   description: >
-    Vertical distance between the edge of the macro and the begining of the
+    Vertical distance between the edge of the macro and the beginning of the
     rows created by tapcell. Only available for ASAP7 PDK and GF180/uart-blocks
     design.
   stages: