@@ -80,94 +80,114 @@ export KLAYOUT_DRC_FILE = $(PLATFORM_DIR)/drc/asap7.lydrc
8080# OpenRCX extRules
8181export RCX_RULES = $(PLATFORM_DIR ) /rcx_patterns.rules
8282
83- # XS - defining function for using LVT
84- ifeq ($(ASAP7_USE_VT ) , LVT)
85- export VT_TAG = L
86- else ifeq ($(ASAP7_USE_VT), SLVT)
87- export VT_TAG = SL
88- else
89- # Default to RVT
90- export VT_TAG = R
91- endif
92-
83+ # PLACEHOLDER gets replaced with the appropriate VT tag in the following templates
84+ export BC_NLDM_DFF_LIB_FILE_T = $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_FF_nldm_220123.lib
85+ export BC_CCS_DFF_LIB_FILE_T = $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_FF_ccs_220123.lib
86+ export WC_NLDM_DFF_LIB_FILE_T = $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_SS_nldm_220123.lib
87+ export TC_NLDM_DFF_LIB_FILE_T = $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_TT_nldm_220123.lib
88+ export BC_NLDM_LIB_FILES_T = $(LIB_DIR ) /asap7sc7p5t_AO_PLACEHOLDERVT_FF_nldm_211120.lib.gz \
89+ $(LIB_DIR ) /asap7sc7p5t_INVBUF_PLACEHOLDERVT_FF_nldm_220122.lib.gz \
90+ $(LIB_DIR ) /asap7sc7p5t_OA_PLACEHOLDERVT_FF_nldm_211120.lib.gz \
91+ $(LIB_DIR ) /asap7sc7p5t_SIMPLE_PLACEHOLDERVT_FF_nldm_211120.lib.gz \
92+ $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_FF_nldm_220123.lib
93+ export BC_CCS_LIB_FILES_T = $(LIB_DIR ) /asap7sc7p5t_AO_PLACEHOLDERVT_FF_ccs_211120.lib.gz \
94+ $(LIB_DIR ) /asap7sc7p5t_INVBUF_PLACEHOLDERVT_FF_ccs_220122.lib.gz \
95+ $(LIB_DIR ) /asap7sc7p5t_OA_PLACEHOLDERVT_FF_ccs_211120.lib.gz \
96+ $(LIB_DIR ) /asap7sc7p5t_SIMPLE_PLACEHOLDERVT_FF_ccs_211120.lib.gz \
97+ $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_FF_ccs_220123.lib
98+ export WC_NLDM_LIB_FILES_T = $(LIB_DIR ) /asap7sc7p5t_AO_PLACEHOLDERVT_SS_nldm_211120.lib.gz \
99+ $(LIB_DIR ) /asap7sc7p5t_INVBUF_PLACEHOLDERVT_SS_nldm_220122.lib.gz \
100+ $(LIB_DIR ) /asap7sc7p5t_OA_PLACEHOLDERVT_SS_nldm_211120.lib.gz \
101+ $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_SS_nldm_220123.lib \
102+ $(LIB_DIR ) /asap7sc7p5t_SIMPLE_PLACEHOLDERVT_SS_nldm_211120.lib.gz
103+ export TC_NLDM_LIB_FILES_T = $(LIB_DIR ) /asap7sc7p5t_AO_PLACEHOLDERVT_TT_nldm_211120.lib.gz \
104+ $(LIB_DIR ) /asap7sc7p5t_INVBUF_PLACEHOLDERVT_TT_nldm_220122.lib.gz \
105+ $(LIB_DIR ) /asap7sc7p5t_OA_PLACEHOLDERVT_TT_nldm_211120.lib.gz \
106+ $(LIB_DIR ) /asap7sc7p5t_SEQ_PLACEHOLDERVT_TT_nldm_220123.lib \
107+ $(LIB_DIR ) /asap7sc7p5t_SIMPLE_PLACEHOLDERVT_TT_nldm_211120.lib.gz
108+ export FILL_CELLS_T = FILLERxp5_ASAP7_75t_ \
109+ FILLER_ASAP7_75t_ \
110+ DECAPx1_ASAP7_75t_ \
111+ DECAPx2_ASAP7_75t_ \
112+ DECAPx4_ASAP7_75t_ \
113+ DECAPx6_ASAP7_75t_ \
114+ DECAPx10_ASAP7_75t_
115+
116+ # Default to RVT if unset
117+ export VT_LIST = $(if $(strip $(ASAP7_USE_VT ) ) , $(ASAP7_USE_VT ) , RVT)
118+
119+ # # The first VT in the ASAP7_USE_VT list is the primary VT. The others get added to OTHER_VT
120+ export PRIMARY_VT = $(word 1, $(VT_LIST ) )
121+ export PRIMARY_VT_TAG = $(strip $(patsubst % VT, % , $(PRIMARY_VT ) ) )
122+ export OTHER_VT = $(wordlist 2, $(words $(VT_LIST ) ) , $(VT_LIST ) )
123+
124+ # # Set cells based on the primary VT first
93125# Set the TIEHI/TIELO cells
94126# These are used in yosys synthesis to avoid logical 1/0's in the netlist
95- export TIEHI_CELL_AND_PORT ?= TIEHIx1_ASAP7_75t_$(VT_TAG ) H
96- export TIELO_CELL_AND_PORT ?= TIELOx1_ASAP7_75t_$(VT_TAG ) L
127+ export TIEHI_CELL_AND_PORT ?= TIEHIx1_ASAP7_75t_$(PRIMARY_VT_TAG ) H
128+ export TIELO_CELL_AND_PORT ?= TIELOx1_ASAP7_75t_$(PRIMARY_VT_TAG ) L
97129
98130# Used in synthesis
99- export MIN_BUF_CELL_AND_PORTS ?= BUFx2_ASAP7_75t_$(VT_TAG ) A Y
131+ export MIN_BUF_CELL_AND_PORTS ?= BUFx2_ASAP7_75t_$(PRIMARY_VT_TAG ) A Y
100132
101- export HOLD_BUF_CELL ?= BUFx2_ASAP7_75t_$(VT_TAG )
133+ export HOLD_BUF_CELL ?= BUFx2_ASAP7_75t_$(PRIMARY_VT_TAG )
102134
103- export ABC_DRIVER_CELL ?= BUFx2_ASAP7_75t_$(VT_TAG )
135+ export ABC_DRIVER_CELL ?= BUFx2_ASAP7_75t_$(PRIMARY_VT_TAG )
104136
105137# Fill cells used in fill cell insertion
106- export FILL_CELLS ?= FILLERxp5_ASAP7_75t_$(VT_TAG ) \
107- FILLER_ASAP7_75t_$(VT_TAG ) \
108- DECAPx1_ASAP7_75t_$(VT_TAG ) \
109- DECAPx2_ASAP7_75t_$(VT_TAG ) \
110- DECAPx4_ASAP7_75t_$(VT_TAG ) \
111- DECAPx6_ASAP7_75t_$(VT_TAG ) \
112- DECAPx10_ASAP7_75t_$(VT_TAG )
138+ export FILL_CELLS ?= $(addsuffix $(PRIMARY_VT_TAG ) , $(FILL_CELLS_T ) )
113139
114- export TAP_CELL_NAME ?= TAPCELL_ASAP7_75t_$(VT_TAG )
140+ export TAP_CELL_NAME ?= TAPCELL_ASAP7_75t_$(PRIMARY_VT_TAG )
115141
116142# GDS_FILES has to be = vs. ?= because GDS_FILES gets set in the ORFS Makefile
117- export GDS_FILES = $(PLATFORM_DIR ) /gds/asap7sc7p5t_28_$(VT_TAG ) _220121a.gds \
118- $(ADDITIONAL_GDS )
143+ export GDS_FILES = $(PLATFORM_DIR ) /gds/asap7sc7p5t_28_$(PRIMARY_VT_TAG ) _220121a.gds
119144
120- export SC_LEF ?= $(PLATFORM_DIR ) /lef/asap7sc7p5t_28_$(VT_TAG ) _1x_220121a.lef
145+ export SC_LEF ?= $(PLATFORM_DIR ) /lef/asap7sc7p5t_28_$(PRIMARY_VT_TAG ) _1x_220121a.lef
121146
122147# Yosys mapping files
123- export LATCH_MAP_FILE ?= $(PLATFORM_DIR ) /yoSys/cells_latch_$(VT_TAG ) .v
124- export CLKGATE_MAP_FILE ?= $(PLATFORM_DIR ) /yoSys/cells_clkgate_$(VT_TAG ) .v
125- export ADDER_MAP_FILE ?= $(PLATFORM_DIR ) /yoSys/cells_adders_$(VT_TAG ) .v
126-
127- export BC_NLDM_DFF_LIB_FILE ?= $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_FF_nldm_220123.lib
128-
129- export BC_NLDM_LIB_FILES ?= $(LIB_DIR ) /asap7sc7p5t_AO_$(VT_TAG ) VT_FF_nldm_211120.lib.gz \
130- $(LIB_DIR ) /asap7sc7p5t_INVBUF_$(VT_TAG ) VT_FF_nldm_220122.lib.gz \
131- $(LIB_DIR ) /asap7sc7p5t_OA_$(VT_TAG ) VT_FF_nldm_211120.lib.gz \
132- $(LIB_DIR ) /asap7sc7p5t_SIMPLE_$(VT_TAG ) VT_FF_nldm_211120.lib.gz \
133- $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_FF_nldm_220123.lib
134-
135- export BC_CCS_LIB_FILES ?= $(LIB_DIR ) /asap7sc7p5t_AO_$(VT_TAG ) VT_FF_ccs_211120.lib.gz \
136- $(LIB_DIR ) /asap7sc7p5t_INVBUF_$(VT_TAG ) VT_FF_ccs_220122.lib.gz \
137- $(LIB_DIR ) /asap7sc7p5t_OA_$(VT_TAG ) VT_FF_ccs_211120.lib.gz \
138- $(LIB_DIR ) /asap7sc7p5t_SIMPLE_$(VT_TAG ) VT_FF_ccs_211120.lib.gz \
139- $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_FF_ccs_220123.lib \
140- $(BC_ADDITIONAL_LIBS )
148+ export LATCH_MAP_FILE ?= $(PLATFORM_DIR ) /yoSys/cells_latch_$(PRIMARY_VT_TAG ) .v
149+ export CLKGATE_MAP_FILE ?= $(PLATFORM_DIR ) /yoSys/cells_clkgate_$(PRIMARY_VT_TAG ) .v
150+ export ADDER_MAP_FILE ?= $(PLATFORM_DIR ) /yoSys/cells_adders_$(PRIMARY_VT_TAG ) .v
141151
142- export BC_CCS_DFF_LIB_FILE ?= $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_FF_ccs_220123.lib
143-
144- export WC_NLDM_DFF_LIB_FILE ?= $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_SS_nldm_220123.lib
145-
146- export WC_NLDM_LIB_FILES ?= $(LIB_DIR ) /asap7sc7p5t_AO_$(VT_TAG ) VT_SS_nldm_211120.lib.gz \
147- $(LIB_DIR ) /asap7sc7p5t_INVBUF_$(VT_TAG ) VT_SS_nldm_220122.lib.gz \
148- $(LIB_DIR ) /asap7sc7p5t_OA_$(VT_TAG ) VT_SS_nldm_211120.lib.gz \
149- $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_SS_nldm_220123.lib \
150- $(LIB_DIR ) /asap7sc7p5t_SIMPLE_$(VT_TAG ) VT_SS_nldm_211120.lib.gz
152+ export BC_NLDM_DFF_LIB_FILE ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(BC_NLDM_DFF_LIB_FILE_T ) )
153+ export BC_NLDM_LIB_FILES ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(BC_NLDM_LIB_FILES_T ) )
154+ export BC_CCS_LIB_FILES ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(BC_CCS_LIB_FILES_T ) ) \
155+ $(BC_ADDITIONAL_LIBS )
156+ export BC_CCS_DFF_LIB_FILE ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(BC_CCS_DFF_LIB_FILE_T ) )
151157
152- export TC_NLDM_DFF_LIB_FILE ?= $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_TT_nldm_220123.lib
158+ export WC_NLDM_DFF_LIB_FILE ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(WC_NLDM_DFF_LIB_FILE_T ) )
159+ export WC_NLDM_LIB_FILES ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(WC_NLDM_LIB_FILES_T ) )
153160
154- export TC_NLDM_LIB_FILES ?= $(LIB_DIR ) /asap7sc7p5t_AO_$(VT_TAG ) VT_TT_nldm_211120.lib.gz \
155- $(LIB_DIR ) /asap7sc7p5t_INVBUF_$(VT_TAG ) VT_TT_nldm_220122.lib.gz \
156- $(LIB_DIR ) /asap7sc7p5t_OA_$(VT_TAG ) VT_TT_nldm_211120.lib.gz \
157- $(LIB_DIR ) /asap7sc7p5t_SEQ_$(VT_TAG ) VT_TT_nldm_220123.lib \
158- $(LIB_DIR ) /asap7sc7p5t_SIMPLE_$(VT_TAG ) VT_TT_nldm_211120.lib.gz
161+ export TC_NLDM_DFF_LIB_FILE ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(TC_NLDM_DFF_LIB_FILE_T ) )
162+ export TC_NLDM_LIB_FILES ?= $(subst PLACEHOLDER,$(PRIMARY_VT_TAG ) ,$(TC_NLDM_LIB_FILES_T ) )
159163
160164ifeq ($(CLUSTER_FLOPS ) ,1)
161165 # Add the multi-bit FF for clustering. These are single corner libraries.
162- export ADDITIONAL_LIBS += $(LIB_DIR ) /asap7sc7p5t_DFFHQNH2V2X_$(VT_TAG ) VT_TT_nldm_FAKE.lib \
163- $(LIB_DIR ) /asap7sc7p5t_DFFHQNV2X_$(VT_TAG ) VT_TT_nldm_FAKE.lib
166+ export ADDITIONAL_LIBS += $(LIB_DIR ) /asap7sc7p5t_DFFHQNH2V2X_$(PRIMARY_VT_TAG ) VT_TT_nldm_FAKE.lib \
167+ $(LIB_DIR ) /asap7sc7p5t_DFFHQNV2X_$(PRIMARY_VT_TAG ) VT_TT_nldm_FAKE.lib
164168
165169 export ADDITIONAL_LEFS += $(PLATFORM_DIR ) /lef/asap7sc7p5t_DFFHQNH2V2X.lef \
166170 $(PLATFORM_DIR ) /lef/asap7sc7p5t_DFFHQNV2X.lef
167171 export ADDITIONAL_SITES += asap7sc7p5t_pg
168172 export GDS_ALLOW_EMPTY ?= DFFHQN[VH][24].*
169173endif
170174
175+ # ## Add additional files to the variables based on the OTHER_VT list
176+ $(foreach vt_type,$(OTHER_VT),\
177+ $(eval OTHER_VT_TAG = $(strip $(patsubst %VT, %, $(vt_type)))) \
178+ $(eval ADDITIONAL_LEFS += $(PLATFORM_DIR)/lef/asap7sc7p5t_28_$(OTHER_VT_TAG)_1x_220121a.lef) \
179+ $(eval BC_NLDM_DFF_LIB_FILE += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(BC_NLDM_DFF_LIB_FILE_T))) \
180+ $(eval BC_CCS_DFF_LIB_FILE += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(BC_CCS_DFF_LIB_FILE_T))) \
181+ $(eval WC_NLDM_DFF_LIB_FILE += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(WC_NLDM_DFF_LIB_FILE_T))) \
182+ $(eval TC_NLDM_DFF_LIB_FILE += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(TC_NLDM_DFF_LIB_FILE_T))) \
183+ $(eval BC_NLDM_LIB_FILES += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(BC_NLDM_LIB_FILES_T))) \
184+ $(eval BC_CCS_LIB_FILES += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(BC_CCS_LIB_FILES_T))) \
185+ $(eval WC_NLDM_LIB_FILES += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(WC_NLDM_LIB_FILES_T))) \
186+ $(eval TC_NLDM_LIB_FILES += $(subst PLACEHOLDER,$(OTHER_VT_TAG),$(TC_NLDM_LIB_FILES_T))) \
187+ $(eval GDS_FILES += $(PLATFORM_DIR)/gds/asap7sc7p5t_28_$(OTHER_VT_TAG)_220121a.gds) \
188+ $(eval FILL_CELLS += $(addsuffix $(PRIMARY_VT_TAG), $(FILL_CELLS_T))) \
189+ )
190+
171191# Dont use SC library based on CORNER selection
172192#
173193# BC - Best case, fastest
@@ -176,6 +196,7 @@ endif
176196export CORNER ?= BC
177197export LIB_FILES += $($(CORNER ) _$(LIB_MODEL ) _LIB_FILES)
178198export LIB_FILES += $(ADDITIONAL_LIBS )
199+ export GDS_FILES += $(ADDITIONAL_GDS )
179200export DB_FILES += $(realpath $($(CORNER ) _DB_FILES) )
180201export TEMPERATURE = $($(CORNER ) _TEMPERATURE)
181202export VOLTAGE = $($(CORNER ) _VOLTAGE)
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