MegaBoom design bring up for ORFS (#1126)

* My - initial MegaBoom design bring-up for ORFS

Signed-off-by: louiic <[email protected]>

* Revert "My - initial MegaBoom design bring-up for ORFS"

This reverts commit faa9f4a.

My - compress verilog file

Signed-off-by: louiic <[email protected]>

* My - initial bring up of MegaBoom design for ORFS

Signed-off-by: louiic <[email protected]>

---------

Signed-off-by: louiic <[email protected]>
Co-authored-by: louiic <[email protected]>

Author: openroad-robot

flow/designs/asap7/megaboom/config.mk

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+export PLATFORM               = asap7
+
+export DESIGN_NAME            = MegaBoom
+export DESIGN_NICKNAME        = megaboom
+
+export VERILOG_FILES          = $(realpath ./designs/src/$(DESIGN_NICKNAME)/rocketchip.MegaBoomConfig.v.gz)
+export VERILOG_FILES         += $(realpath ./designs/src/$(DESIGN_NICKNAME)/rocketchip.MegaBoomConfig.behav_srams.v)
+
+export SDC_FILE               = $(realpath ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc)
+export SYNTH_SDC_FILE         = $(SDC_FILE)
+
+export CORE_UTILIZATION       = 40
+export CORE_ASPECT_RATIO      = 1
+export CORE_MARGIN            = 5
+export PLACE_DENSITY_LB_ADDON = 0.05
+
+export BC_ADDITIONAL_LIBS    += $(PLATFORM_DIR)/lib/fakeram_256x128.lib \
+                                $(PLATFORM_DIR)/lib/fakeram_256x64.lib \
+                                $(PLATFORM_DIR)/lib/fakeram_32x46.lib \
+                                $(PLATFORM_DIR)/lib/fakeram_512x8.lib \
+                                $(PLATFORM_DIR)/lib/fakeram_64x20.lib \
+                                $(PLATFORM_DIR)/lib/fakeram_64x22.lib 
+
+export ADDITIONAL_LEFS       += $(PLATFORM_DIR)/lef/fakeram_256x128.lef \
+                                $(PLATFORM_DIR)/lef/fakeram_256x64.lef \
+                                $(PLATFORM_DIR)/lef/fakeram_32x46.lef \
+                                $(PLATFORM_DIR)/lef/fakeram_512x8.lef \
+                                $(PLATFORM_DIR)/lef/fakeram_64x20.lef \
+                                $(PLATFORM_DIR)/lef/fakeram_64x22.lef 
+
+
+#export CACHED_NETLIST         = $(realpath ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/MegaBoom.v)

flow/designs/asap7/megaboom/constraint.sdc

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+set clk_name      clock
+set clk_port_name clock
+set clk_period    5000 
+set clk_io_pct    0.2
+
+set clk_port      [get_ports $clk_port_name]
+
+create_clock -name $clk_name -period $clk_period $clk_port
+
+set non_clock_inputs [lsearch -inline -all -not -exact [all_inputs] $clk_port]
+
+set_input_delay  [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs 
+set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]
+

flow/designs/src/megaboom/README.md

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+MegaBoom design for ORFS
+Derived from Ravi's megaboom branch originated from https://boom-core.org.
+
+rocketchip.MegaBoomConfig.behav_srams.v - memory behavior file
+The memory behavior modules are modified to include optional instantiation of FakeRam.
+These FakeRams were generated from FakeRam2.0 and are part of ASAP7's ORFS platform.
+The instantiation of FakeRams are triggered by `define WITHFAKERAM. The `define declaration
+is contained within openROAD.h file.
+
+openROAD.h - auxillary file for switches
+The RTL delivery includs testing harness module that instantiate Megaboom. In order to allow
+synthesis to synthesize the Megaboom hierachy rather than the testing harness, 'define TESTHARNESS
+has been commented out.
+
+The testing harness is useful when used within simulation platform for testing the MegaBoom design.
+    
+

flow/designs/src/megaboom/openROAD.h

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+/* This file contain switch for the following
+ *    WITHFAKERAM - skip behavior model definition for memory usage,
+ *                  instead, instantiate appropriate fakeram from 
+ *                  the platform data
+ *    TESTHARNESS - MegaBoom netilst does contain testing mechanism
+ *                  This is higher up module that instantiate MegaBoom.
+ *                  This switch change the top level of the entire design.
+ *                  Please change the ORFS script accordingly.
+*/
+
+// use fakeram_* from ASAP7 platform data
+`define WITHFAKERAM
+
+// do not enabl test harness, keep top level as MegaBoom
+// `define TESTHARNESS