Merge pull request #709 from Pinata-Consulting/reproduce-via-on-pin-in-lef-crash

Reproduce via on pin in lef crash

Author: maliberty

flow/designs/asap7/uart-blocks/config.mk

@@ -0,0 +1,20 @@
+export PLATFORM               = asap7
+
+export DESIGN_NAME            = uart
+export DESIGN_NICKNAME        = uart-blocks
+
+export VERILOG_FILES = ./designs/src/uart-no-param/*.v
+export SDC_FILE      = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
+
+export BLOCKS = uart_rx
+
+export VERILOG_FILES_BLACKBOX = ./designs/src/uart-no-param/uart_rx.v
+
+export ABC_CLOCK_PERIOD_IN_PS = 300000
+
+export CORE_UTILIZATION       = 10
+export CORE_ASPECT_RATIO      = 1
+export CORE_MARGIN            = 2
+export PLACE_DENSITY          = 0.12
+
+export CORNER                 = TC

flow/designs/asap7/uart-blocks/constraint.sdc

@@ -0,0 +1,13 @@
+set clk_name  clk
+set clk_port_name clk
+set clk_period 300 
+set clk_io_pct 0.2
+
+set clk_port [get_ports $clk_port_name]
+
+create_clock -name $clk_name -period $clk_period $clk_port
+
+set non_clock_inputs [lsearch -inline -all -not -exact [all_inputs] $clk_port]
+
+set_input_delay  [expr $clk_period * $clk_io_pct] -clock $clk_name $non_clock_inputs 
+set_output_delay [expr $clk_period * $clk_io_pct] -clock $clk_name [all_outputs]

flow/designs/asap7/uart-blocks/metadata-base-ok.json

@@ -0,0 +1,288 @@
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