1- load ("@bazel-orfs//:openroad.bzl" , "orfs_flow" )
1+ load ("@bazel-orfs//:sweep.bzl" , "orfs_sweep" )
2+ load ("//util:plot_congestion.bzl" , "plot_congestion" )
23
3- filegroup (
4- name = "constraints-swerv" ,
5- srcs = [
6- "designs/asap7/swerv_wrapper/constraint.sdc" ,
7- ],
8- visibility = [":__subpackages__" ],
9- )
4+ # Format densities, rounding to 2 decimal places.
5+ SWEEPS = {
6+ "PLACE_DENSITY_LB_ADDON" : [str (0.20 + x * 0.01 + 0.005 )[:4 ] for x in range (10 )],
7+ "CORE_UTILIZATION" : [str (40 + x * 5 ) for x in range (4 )],
8+ }
109
11- filegroup (
12- name = "additional_lefs" ,
13- srcs = glob (include = ["designs/asap7/swerv_wrapper/lef/*.lef" ]),
14- )
15-
16- filegroup (
17- name = "additional_libs" ,
18- srcs = glob (include = ["designs/asap7/swerv_wrapper/lib/*.lib" ]),
19- )
10+ SWEEP = "PLACE_DENSITY_LB_ADDON"
2011
21- all_sources = [
22- ":additional_lefs" ,
23- ":additional_libs" ,
24- ]
25-
26- orfs_flow (
12+ orfs_sweep (
2713 name = "swerv_wrapper" ,
2814 arguments = {
2915 "LIB_MODEL" : "CCS" ,
@@ -35,27 +21,37 @@ orfs_flow(
3521 "DIE_AREA" : "0 0 550 600" ,
3622 "CORE_AREA" : "5 5 545 595" ,
3723 "PLACE_PINS_ARGS" : "-exclude left:* -exclude right:*" ,
38- "PLACE_PINS_ARGS" : "-exclude left:* -exclude right:*" ,
3924 "PLACE_DENSITY_LB_ADDON" : "0.20" ,
4025 "TNS_END_PERCENT" : "100" ,
4126 "PWR_NETS_VOLTAGEsS" : "" ,
4227 "GND_NETS_VOLTAGES" : "" ,
4328 },
29+ other_variants = {"base" : {}},
4430 sources = {
45- "ADDITIONAL_LEFS" : ":additional_lefs" ,
46- "ADDITIONAL_LIBS" : ":additional_libs" ,
47- "SDC_FILE" : ":constraints-swerv" ,
31+ "ADDITIONAL_LEFS" : glob ( include = [ "lef/*.lef" ]) ,
32+ "ADDITIONAL_LIBS" : glob ( include = [ "lib/*.lib" ]) ,
33+ "SDC_FILE" : [ ":constraint.sdc" ] ,
4834 },
49- stage_sources = {
50- "synth" : all_sources ,
51- "floorplan" : all_sources ,
52- "place" : all_sources ,
53- "cts" : all_sources ,
54- "route" : all_sources ,
55- "final" : all_sources ,
35+ sweep = {
36+ value : {
37+ "arguments" : {
38+ SWEEP : value ,
39+ },
40+ "previous_stage" : {
41+ "floorplan" : "swerv_wrapper_synth" ,
42+ },
43+ }
44+ for value in SWEEPS [SWEEP ]
5645 },
5746 verilog_files = [
5847 "macros.v" ,
59- "//designs/src/swerv_wrapper :verilog" ,
48+ "//designs/src/swerv :verilog" ,
6049 ],
6150)
51+
52+ plot_congestion (
53+ name = "plot" ,
54+ srcs = [":swerv_wrapper_{value}_grt" .format (value = value ) for value in SWEEPS [SWEEP ]],
55+ argument = SWEEP ,
56+ values = SWEEPS [SWEEP ],
57+ )
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