Signed-off-by: louiic <pchaiyakul@ucsd.edu>

louiic · mynguyenXS · louiic · commit 4a00b55e8226 · 2023-08-02T20:12:48.000-07:00
Co-authored-by: My Nguyen &lt;my@xicretservices.com&gt;
diff --git a/flow/designs/asap7/mock-array/constraints.sdc b/flow/designs/asap7/mock-array/constraints.sdc
@@ -25,4 +25,3 @@ set_output_delay [expr $clk_period * $clk_o2_pct] -clock ${clk_name}_vir [get_po
 
 set_max_transition 300 [current_design]
 set_max_transition 100 -clock_path [all_clocks]
-

Original file line number	Diff line number	Diff line change
`@@ -25,4 +25,3 @@ set_output_delay [expr $clk_period * $clk_o2_pct] -clock ${clk_name}_vir [get_po`
`25`	`25`
`26`	`26`	`set_max_transition 300 [current_design]`
`27`	`27`	`set_max_transition 100 -clock_path [all_clocks]`
`28`		`-`