Skip to content

Commit 506e666

Browse files
committed
Merge branch 'secure-restore_ppl_fix' into secure-yosys0.49
Signed-off-by: Eder Monteiro <[email protected]>
2 parents abc8590 + d862a2d commit 506e666

Some content is hidden

Large Commits have some content hidden by default. Use the searchbox below for content that may be hidden.

54 files changed

+3111
-2718
lines changed

flow/designs/asap7/aes/autotuner.json

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@
44
"type": "float",
55
"minmax": [
66
300,
7-
400
7+
600
88
],
99
"step": 0
1010
},
@@ -35,16 +35,16 @@
3535
"CELL_PAD_IN_SITES_GLOBAL_PLACEMENT": {
3636
"type": "int",
3737
"minmax": [
38-
1,
39-
5
38+
0,
39+
3
4040
],
4141
"step": 1
4242
},
4343
"CELL_PAD_IN_SITES_DETAIL_PLACEMENT": {
4444
"type": "int",
4545
"minmax": [
46-
1,
47-
5
46+
0,
47+
3
4848
],
4949
"step": 1
5050
},
@@ -60,7 +60,7 @@
6060
"type": "float",
6161
"minmax": [
6262
0.0,
63-
0.1
63+
0.2
6464
],
6565
"step": 0
6666
},

flow/designs/asap7/aes/metadata-base-ok.json

Lines changed: 262 additions & 191 deletions
Large diffs are not rendered by default.

flow/designs/asap7/aes/rules-base.json

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,7 @@
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
35-
"value": 86754,
35+
"value": 86627,
3636
"compare": "<="
3737
},
3838
"detailedroute__route__drc_errors": {
@@ -48,11 +48,11 @@
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {
51-
"value": -79.92,
51+
"value": -66.42,
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
55-
"value": 2354,
55+
"value": 2350,
5656
"compare": "<="
5757
},
5858
"finish__timing__drv__setup_violation_count": {
@@ -64,7 +64,7 @@
6464
"compare": "<="
6565
},
6666
"finish__timing__wns_percent_delay": {
67-
"value": -23.72,
67+
"value": -20.87,
6868
"compare": ">="
6969
}
7070
}

flow/designs/asap7/gcd/autotuner.json

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -3,8 +3,8 @@
33
"_SDC_CLK_PERIOD": {
44
"type": "float",
55
"minmax": [
6-
300,
7-
1000
6+
200,
7+
500
88
],
99
"step": 0
1010
},
@@ -19,16 +19,16 @@
1919
"CELL_PAD_IN_SITES_GLOBAL_PLACEMENT": {
2020
"type": "int",
2121
"minmax": [
22-
1,
23-
5
22+
0,
23+
3
2424
],
2525
"step": 1
2626
},
2727
"CELL_PAD_IN_SITES_DETAIL_PLACEMENT": {
2828
"type": "int",
2929
"minmax": [
30-
1,
31-
5
30+
0,
31+
3
3232
],
3333
"step": 1
3434
},
@@ -44,7 +44,7 @@
4444
"type": "float",
4545
"minmax": [
4646
0.0,
47-
0.1
47+
0.2
4848
],
4949
"step": 0
5050
},

flow/designs/asap7/gcd/config.mk

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -12,3 +12,8 @@ export PLACE_DENSITY = 0.35
1212
# a smoketest for this option, there are a
1313
# few last gasp iterations
1414
export SKIP_LAST_GASP ?= 1
15+
16+
# AutoTuner results
17+
export CELL_PAD_IN_SITES_GLOBAL_PLACEMENT = 0
18+
export CELL_PAD_IN_SITES_DETAIL_PLACEMENT = 0
19+
export PLACE_DENSITY_LB_ADDON = 0.14

flow/designs/asap7/gcd/constraint.sdc

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ current_design gcd
22

33
set clk_name core_clock
44
set clk_port_name clk
5-
set clk_period 390
5+
set clk_period 310
66
set clk_io_pct 0.2
77

88
set clk_port [get_ports $clk_port_name]

0 commit comments

Comments
 (0)