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apply tclfmt
Signed-off-by: Jack Luar <[email protected]>
1 parent f849db4 commit 6369d28

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-91
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3 files changed

+78
-91
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‎flow/util/cell-veneer/lefdef.tcl‎

Lines changed: 53 additions & 55 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,7 @@ proc read_macros { file_name } {
9898
} elseif { [regexp {FOREIGN\s+([^\s]*)\s+([^\s]*)\s+([^\s]*)} $line - foreign x y] } {
9999
dict set cells $cell_name foreign \
100100
[list ref $foreign \
101-
origin [lmap x [list $x $y] { expr round($x * $def_units) }]]
101+
origin [lmap x [list $x $y] { expr round($x * $def_units) }]]
102102
} elseif { [regexp {SIZE\s+([^\s]*)\s+BY\s+([^\s]*)} $line - width height] } {
103103
dict set cells $cell_name die_area \
104104
[list 0 0 \
@@ -123,8 +123,10 @@ proc read_macros { file_name } {
123123
dict set cells $cell_name pins $pin_name use $use
124124
} elseif { [regexp {ANTENNAMODEL\s+([^\s]*)} $line - antennamodel] } {
125125
continue
126-
} elseif { [regexp {ANTENNAGATEAREA\s+([^\s]*)\s+LAYER\s+([^\s]*)} \
127-
$line - gate_area layer] } {
126+
} elseif {
127+
[regexp {ANTENNAGATEAREA\s+([^\s]*)\s+LAYER\s+([^\s]*)} \
128+
$line - gate_area layer]
129+
} {
128130
if { [info vars antennamodel] == "" } {
129131
set antennamodel "default"
130132
}
@@ -146,8 +148,10 @@ proc read_macros { file_name } {
146148
}
147149
lappend model [list gate_area $gate_area]
148150
dict set cells $cell_name pins $pin_name antenna_model $antennamodel $model
149-
} elseif { [regexp {ANTENNADIFFAREA\s+([^\s]*)\s+LAYER\s+([^\s]*)} \
150-
$line - antennadiffarea layer] } {
151+
} elseif {
152+
[regexp {ANTENNADIFFAREA\s+([^\s]*)\s+LAYER\s+([^\s]*)} \
153+
$line - antennadiffarea layer]
154+
} {
151155
dict set cells $cell_name pins $pin_name antennadiffarea area $antennadiffarea
152156
dict set cells $cell_name pins $pin_name antennadiffarea layer $antennadiffarea
153157
} elseif { [regexp {ANTENNADIFFAREA\s+([^\s]*)\s} $line - antennadiffarea] } {
@@ -163,8 +167,10 @@ proc read_macros { file_name } {
163167
continue
164168
} elseif { [regexp {LAYER\s+([^\s]*)} $line - layer] } {
165169
continue
166-
} elseif { [regexp {RECT\s+MASK\s+([^\s]*)\s+([0-9\-\.]*)\s\s*([0-9\-\.]*)\
167-
\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)} $line - mask x1 y1 x2 y2] } {
170+
} elseif {
171+
[regexp {RECT\s+MASK\s+([^\s]*)\s+([0-9\-\.]*)\s\s*([0-9\-\.]*)\
172+
\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)} $line - mask x1 y1 x2 y2]
173+
} {
168174
if { [dict exists $port layers $layer shapes] } {
169175
set layer_shapes [dict get $port layers $layer shapes]
170176
} else {
@@ -183,8 +189,10 @@ proc read_macros { file_name } {
183189
mask $mask]
184190
lappend layer_shapes $new_shape
185191
dict set port layers $layer shapes $layer_shapes
186-
} elseif { [regexp {RECT\s([0-9\-\.]*)\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)\
187-
\s\s*([0-9\-\.]*)} $line - x1 y1 x2 y2] } {
192+
} elseif {
193+
[regexp {RECT\s([0-9\-\.]*)\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)\
194+
\s\s*([0-9\-\.]*)} $line - x1 y1 x2 y2]
195+
} {
188196
if { [dict exists $port layers $layer shapes] } {
189197
set layer_shapes [dict get $port layers $layer shapes]
190198
} else {
@@ -196,11 +204,10 @@ proc read_macros { file_name } {
196204
set offset [lmap x [list $x1 $y1] { expr round($x * $def_units) }]
197205
dict set port fixed $offset
198206
}
199-
set new_shape [list \
207+
set new_shape [list \
200208
rect [relative_rectangle \
201209
[lmap x [list $x1 $y1 $x2 $y2] { expr round($x * $def_units) }] \
202-
$offset] \
203-
]
210+
$offset]]
204211
lappend layer_shapes $new_shape
205212
dict set port layers $layer shapes $layer_shapes
206213
} elseif { [regexp {END} $line] } {
@@ -227,36 +234,39 @@ proc read_macros { file_name } {
227234
set line [gets $ch]
228235
if { [regexp {^\s*$} $line] } {
229236
continue
230-
} elseif { [regexp {LAYER\s+([^\s]*)(\s+DESIGNRULEWIDTH\s+([0-9.]+))?} \
231-
$line - layer - drw] } {
237+
} elseif {
238+
[regexp {LAYER\s+([^\s]*)(\s+DESIGNRULEWIDTH\s+([0-9.]+))?} \
239+
$line - layer - drw]
240+
} {
232241
if { $drw != "" } {
233242
dict set cells $cell_name layers $layer drw $drw
234243
}
235244
continue
236-
} elseif { [regexp {RECT\s+MASK\s+([^\s]*)\s+([0-9\-\.]*)\s\s*([0-9\-\.]*)\
237-
\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)} $line - mask x1 y1 x2 y2] } {
245+
} elseif {
246+
[regexp {RECT\s+MASK\s+([^\s]*)\s+([0-9\-\.]*)\s\s*([0-9\-\.]*)\
247+
\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)} $line - mask x1 y1 x2 y2]
248+
} {
238249
if { [dict exists $cells $cell_name obstructions $layer] } {
239250
set obstructions [dict get $cells $cell_name obstructions $layer]
240251
} else {
241252
set obstructions {}
242253
}
243-
lappend obstructions [concat \
254+
lappend obstructions [concat \
244255
[list rect [lmap x [list $x1 $y1 $x2 $y2] { expr round($x * $def_units) }]] \
245-
[list mask $mask] \
246-
]
256+
[list mask $mask]]
247257
dict set cells $cell_name obstructions $layer $obstructions
248-
} elseif { [regexp {RECT\s([0-9\-\.]*)\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)\
249-
\s\s*([0-9\-\.]*)} $line - x1 y1 x2 y2] } {
258+
} elseif {
259+
[regexp {RECT\s([0-9\-\.]*)\s\s*([0-9\-\.]*)\s\s*([0-9\-\.]*)\
260+
\s\s*([0-9\-\.]*)} $line - x1 y1 x2 y2]
261+
} {
250262
if { [dict exists $cells $cell_name obstructions $layer] } {
251263
set obstructions [dict get $cells $cell_name obstructions $layer]
252264
} else {
253265
set obstructions {}
254266
}
255-
lappend obstructions [concat \
267+
lappend obstructions [concat \
256268
[list rect \
257-
[lmap x [list $x1 $y1 $x2 $y2] { expr round($x * $def_units) }] \
258-
] \
259-
]
269+
[lmap x [list $x1 $y1 $x2 $y2] { expr round($x * $def_units) }]]]
260270
dict set cells $cell_name obstructions $layer $obstructions
261271
} elseif { [regexp {END} $line] } {
262272
break
@@ -337,8 +347,7 @@ proc write { design } {
337347
out " FOREIGN [dict get $design foreign ref] [dict get $design foreign origin] ;"
338348
out [concat \
339349
" SIZE [expr 1.0 * [lindex [dict get $design die_area] 2] / $def_units]" \
340-
" BY [expr 1.0 * [lindex [dict get $design die_area] 3] / $def_units] ;" \
341-
]
350+
" BY [expr 1.0 * [lindex [dict get $design die_area] 3] / $def_units] ;"]
342351
out " SYMMETRY [dict get $design symmetry] ;"
343352
if { [dict exists $design site] } {
344353
out " SITE [dict get $design site] ;"
@@ -369,10 +378,9 @@ proc write { design } {
369378

370379
if { [dict exists $shape mask] } {
371380
out [concat \
372-
" RECT MASK [dict get $shape mask]" \
373-
" [lmap x $rect { expr {1.0 * $x / $def_units} }]" \
374-
" ;" \
375-
]
381+
" RECT MASK [dict get $shape mask]" \
382+
" [lmap x $rect { expr { 1.0 * $x / $def_units } }]" \
383+
" ;"]
376384
} else {
377385
out " RECT [lmap x $rect { expr 1.0 * $x / $def_units }] ;"
378386
}
@@ -393,8 +401,7 @@ proc write { design } {
393401
set sheet [concat \
394402
0 0 \
395403
[expr 1.0 * [lindex [dict get $design die_area] 2] / $def_units] \
396-
[expr 1.0 * [lindex [dict get $design die_area] 3] / $def_units] \
397-
]
404+
[expr 1.0 * [lindex [dict get $design die_area] 3] / $def_units]]
398405
foreach layer_name [get_blockage_layers $design] {
399406
if { [dict exists $design layers $layer_name drw] } {
400407
set drw "DESIGNRULEWIDTH [dict get $design layers $layer_name drw] "
@@ -408,12 +415,11 @@ proc write { design } {
408415
dict for {layer_name obstructions} [dict get $design obstructions] {
409416
out " LAYER $layer_name ;"
410417
foreach obs $obstructions {
411-
if { [dict exists $obs mask] } {
418+
if { [dict exists $obs mask] } {
412419
out [concat \
413420
" RECT MASK [dict get $obs mask]" \
414-
" [lmap x [dict get $obs rect] { expr {1.0 * $x / $def_units} }]" \
415-
" ;" \
416-
]
421+
" [lmap x [dict get $obs rect] { expr { 1.0 * $x / $def_units } }]" \
422+
" ;"]
417423
} else {
418424
out " RECT [lmap x [dict get $obs rect] { expr 1.0 * $x / $def_units }] ;"
419425
}
@@ -579,8 +585,7 @@ proc shift_point { point x y } {
579585
proc shift_rect { rect x y } {
580586
return [concat \
581587
[list [expr [lindex $rect 0] + $x] [expr [lindex $rect 1] + $y]] \
582-
[list [expr [lindex $rect 2] + $x] [expr [lindex $rect 3] + $y]] \
583-
]
588+
[list [expr [lindex $rect 2] + $x] [expr [lindex $rect 3] + $y]]]
584589
}
585590

586591
proc shift_origin { design x y } {
@@ -770,8 +775,7 @@ proc write { design } {
770775
out ""
771776
out [concat \
772777
"DIEAREA ( [lrange [dict get $design die_area] 0 1] )" \
773-
" ( [lrange [dict get $design die_area] 2 3] ) ;" \
774-
]
778+
" ( [lrange [dict get $design die_area] 2 3] ) ;"]
775779

776780
if { [dict exists $design tracks] } {
777781

@@ -784,12 +788,10 @@ proc write { design } {
784788
[dict get $design rows $idx site] \
785789
[dict get $design rows $idx start] \
786790
[dict get $design rows $idx height] \
787-
[dict get $design rows $idx orientation] \
788-
]
791+
[dict get $design rows $idx orientation]]
789792
out [concat \
790793
" DO [dict get $design rows $idx num_sites] BY 1 STEP " \
791-
"[dict get $design rows $idx site_width] 0 ;" \
792-
]
794+
"[dict get $design rows $idx site_width] 0 ;"]
793795
}
794796
}
795797

@@ -799,8 +801,7 @@ proc write { design } {
799801
dict for {pin_name pin} [dict get $design pins] {
800802
out -nonewline [concat \
801803
"- $pin_name + NET [dict get $pin net_name]" \
802-
"+ DIRECTION [dict get $pin direction] " \
803-
]
804+
"+ DIRECTION [dict get $pin direction] "]
804805
if { [dict exists $pin use] } {
805806
out -nonewline "+ USE [dict get $pin use] "
806807
}
@@ -898,10 +899,9 @@ proc write { design } {
898899
set mask ""
899900
}
900901
if { [llength $point] == 2 } {
901-
out -nonewline [concat \
902+
out -nonewline [concat \
902903
" + $type [dict get $route layer] " \
903-
"[get_line_width [dict get $route layer] [list $first_point $point]] " \
904-
]
904+
"[get_line_width [dict get $route layer] [list $first_point $point]] "]
905905
out -nonewline $shape
906906
out -nonewline $points
907907
out -nonewline $mask
@@ -935,18 +935,16 @@ proc write { design } {
935935
out -nonewline [concat \
936936
" + ROUTED [dict get $route layer] " \
937937
"[expr round([dict get $route width])] " \
938-
"+ SHAPE [dict get $route shape] " \
939-
]
938+
"+ SHAPE [dict get $route shape] "]
940939
foreach point [dict get $route points] {
941940
out -nonewline " $point"
942941
}
943942
out ""
944943

945944
foreach route [lrange [dict get $net routes] 1 end] {
946-
out [concat \
945+
out [concat \
947946
" NEW [dict get $route layer] [expr round([dict get $route width])]" \
948-
"+ SHAPE [dict get $route shape] " \
949-
]
947+
"+ SHAPE [dict get $route shape] "]
950948
foreach point [dict get $route points] {
951949
out -nonewline " $point"
952950
}

‎flow/util/cell-veneer/wrap_stdcells.tcl‎

Lines changed: 20 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -102,8 +102,10 @@ proc clear_left { physical_pin blockages } {
102102
set track [dict get $physical_pin track]
103103

104104
foreach blockage $blockages {
105-
if { [dict get $blockage track] == $track && \
106-
[dict get $blockage to] < [dict get $physical_pin from] } {
105+
if {
106+
[dict get $blockage track] == $track &&
107+
[dict get $blockage to] < [dict get $physical_pin from]
108+
} {
107109
return 0
108110
}
109111
}
@@ -114,8 +116,10 @@ proc clear_right { physical_pin blockages } {
114116
set track [dict get $physical_pin track]
115117

116118
foreach blockage $blockages {
117-
if { [dict get $blockage track] == $track && \
118-
[dict get $blockage from] > [dict get $physical_pin to] } {
119+
if {
120+
[dict get $blockage track] == $track &&
121+
[dict get $blockage from] > [dict get $physical_pin to]
122+
} {
119123
return 0
120124
}
121125
}
@@ -184,7 +188,7 @@ proc move_m2_pins_to_edge { cell_name cell_data } {
184188
set new_pin_layer_width [expr round( \
185189
[dict get $wrapper_cfg layer $new_pin_layer_name width] * \
186190
$def_units \
187-
)]
191+
)]
188192
set cell_width [lindex [dict get [lef get_cell $cell_name] die_area] 2]
189193
set design [wrapper::create_def_wrapper $cell_name ${cell_name}_mod]
190194
set lower_y [expr 2 * 128]
@@ -290,9 +294,7 @@ proc move_m2_pins_to_edge { cell_name cell_data } {
290294
[expr round($x2 - ($new_pin_layer_width / 2))] \
291295
$lower_y \
292296
[expr round($x2 + ($new_pin_layer_width / 2))] \
293-
$upper_y \
294-
] \
295-
]
297+
$upper_y]]
296298
if { [dict exists $port layers "M1" shapes] } {
297299
set shapes [dict get $port layers "M1" shapes]
298300
} else {
@@ -382,8 +384,7 @@ proc move_m2_pins_to_edge { cell_name cell_data } {
382384
0 \
383385
[concat \
384386
[expr [lindex [dict get $design die_area] 2] + \
385-
(($pad_idx - ($left_padding + 1)) * $padding_cell_width)] \
386-
] \
387+
(($pad_idx - ($left_padding + 1)) * $padding_cell_width)]] \
387388
[lindex [dict get $design die_area] 3]]
388389

389390
# Extend VDD, VSS, VPW, VNW pins to be the width of the wrapper
@@ -452,10 +453,7 @@ proc get_pin_rect { port layer } {
452453
return [absolute_rectangle \
453454
[dict get \
454455
[lindex \
455-
[dict get $port layers $layer shapes] 0 \
456-
] rect \
457-
] $offset \
458-
]
456+
[dict get $port layers $layer shapes] 0] rect] $offset]
459457
}
460458

461459
proc wrap_macro { cell_name } {
@@ -523,8 +521,7 @@ proc wrap_macro { cell_name } {
523521
dict set net_info [dict get $grid_pins $pin_pos] h_offset \
524522
[expr \
525523
[dict get $net_info [dict get $grid_pins $prev_pos] h_offset] \
526-
+ 3 \
527-
]
524+
+ 3]
528525
}
529526
set prev_pos $pin_pos
530527
}
@@ -580,13 +577,10 @@ proc wrap_macro { cell_name } {
580577
dict set new_port fixed [list 0 $y_position]
581578
dict set new_port layers "C4" shapes [list \
582579
[list rect [concat \
583-
[list 0 \
584-
[expr 0 - [dict get $tech layer C4 width] / 2] \
585-
[dict get $tech layer C4 depth] \
586-
[expr 0 + [dict get $tech layer C4 width] / 2] \
587-
] \
588-
]] \
589-
]
580+
[list 0 \
581+
[expr 0 - [dict get $tech layer C4 width] / 2] \
582+
[dict get $tech layer C4 depth] \
583+
[expr 0 + [dict get $tech layer C4 width] / 2]]]]]
590584
# debug "Replacing pin $net_name with $new_port"
591585
dict set wrapper pins $net_name ports [list $new_port]
592586

@@ -595,8 +589,7 @@ proc wrap_macro { cell_name } {
595589
# First segment from RAM to jog location, to the y grid of the pin
596590
set target_grid_point [expr \
597591
($wrapper_depth - [dict get $net h_offset]) * \
598-
[dict get $tech pitch vertical_track] \
599-
]
592+
[dict get $tech pitch vertical_track]]
600593
set width [dict get $tech layer [dict get $net pin_layer] width]
601594
lappend segments [list \
602595
layer [dict get $net pin_layer] \
@@ -641,7 +634,7 @@ proc test_harness { wrappers } {
641634
def new_design "test_harness" [dict get $wrapper_cfg def_units] \
642635
[concat [list 0 0] \
643636
[list [expr round($grid_x_size * $num_grids)] \
644-
[expr round($grid_y_size * $num_grids)]]]
637+
[expr round($grid_y_size * $num_grids)]]]
645638

646639
foreach cell [dict keys $wrappers] {
647640
set x [expr round(($idx % $num_grids) * $grid_x_size)]
@@ -687,7 +680,7 @@ proc convert_tech_to_def_units { tech } {
687680
dict set tech layer $layer_name $property \
688681
[expr round( \
689682
[dict get $layer $property] * $def_units \
690-
)]
683+
)]
691684
}
692685
}
693686
}

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