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Merge pull request #2963 from Pinata-Consulting/synth-consistent-with-tcl-script-knowing-input
synth: consistent with other .tcl scripts, it knows its input
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flow/Makefile

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@@ -448,8 +448,7 @@ yosys-dependencies: $(YOSYS_DEPENDENCIES)
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.PHONY: do-yosys
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do-yosys: $(DONT_USE_SC_LIB)
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mkdir -p $(RESULTS_DIR) $(LOG_DIR) $(REPORTS_DIR) $(OBJECTS_DIR)
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(export VERILOG_FILES=$(RESULTS_DIR)/1_synth.rtlil; \
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$(TIME_CMD) $(YOSYS_EXE) $(YOSYS_FLAGS) -c $(SYNTH_SCRIPT)) 2>&1 | tee $(abspath $(LOG_DIR)/1_1_yosys.log)
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($(TIME_CMD) $(YOSYS_EXE) $(YOSYS_FLAGS) -c $(SYNTH_SCRIPT)) 2>&1 | tee $(abspath $(LOG_DIR)/1_1_yosys.log)
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.PHONY: do-yosys-canonicalize
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do-yosys-canonicalize: yosys-dependencies $(DONT_USE_SC_LIB)

flow/scripts/synth.tcl

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@@ -1,3 +1,5 @@
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set ::env(VERILOG_FILES) $::env(RESULTS_DIR)/1_synth.rtlil
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source $::env(SCRIPTS_DIR)/synth_preamble.tcl
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hierarchy -check -top $::env(DESIGN_NAME)

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