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lines changed Original file line number Diff line number Diff line change @@ -377,7 +377,6 @@ PLACE_PINS_ARGS:
377377 Arguments to place_pins
378378 stages :
379379 - place
380- default : " "
381380PLACE_DENSITY :
382381 description : >
383382 The desired average placement density of cells: 1.0 = dense, 0.0 = widely spread.
@@ -407,7 +406,6 @@ GLOBAL_PLACEMENT_ARGS:
407406 description : >
408407 Use additional tuning parameters during global placement other than default
409408 args defined in global_place.tcl.
410- default : " "
411409ENABLE_DPO :
412410 description : |
413411 Enable detail placement with improve_placement feature.
@@ -603,7 +601,6 @@ VERILOG_DEFINES:
603601 description : >
604602 Preprocessor defines passed to the language frontend.
605603 Example: `-D HPDCACHE_ASSERT_OFF`
606- default : " "
607604 stages :
608605 - synth
609606SDC_FILE :
@@ -683,7 +680,6 @@ SYNTH_KEEP_MODULES:
683680SYNTH_ARGS :
684681 description : |
685682 Optional synthesis variables for yosys.
686- default : " "
687683SYNTH_HIER_SEPARATOR :
688684 description : |
689685 Separator used for the synthesis flatten stage.
@@ -693,7 +689,6 @@ VERILOG_TOP_PARAMS:
693689 Apply toplevel params (if exist).
694690 stages :
695691 - synth
696- default : " "
697692CORE_ASPECT_RATIO :
698693 description : >
699694 The core aspect ratio (height / width). This value is ignored if
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