Merge branch 'master' into secure-yosys0.48

Signed-off-by: Eder Monteiro <[email protected]>

Author: eder-matheus

flow/.bazelversion

@@ -1 +1 @@
-7.2.1
+7.4.0rc3

flow/BUILD.bazel

@@ -10,7 +10,7 @@ filegroup(
 
 orfs_flow(
     name = "gcd",
-    stage_args = {
+    stage_arguments = {
         "synth": {
             "SDC_FILE": "$(location :constraints-gcd)",
         },
@@ -64,7 +64,7 @@ all_sources = [":additional_lefs", ":additional_libs"]
 
 orfs_flow(
     name = "swerv_wrapper",
-    stage_args = {
+    stage_arguments = {
         "synth": SWERV_ALL | {
             "SYNTH_HIERARCHICAL": "1",
             "SDC_FILE": "$(location :constraints-swerv)",
@@ -153,7 +153,7 @@ MOCK_ARRAY_FLOORPLAN_PLACE = {
 orfs_flow(
     name = "MockArray",
     macros = ["Element_generate_abstract"],
-    stage_args = {
+    stage_arguments = {
         "synth": {
             "SDC_FILE": "$(location :mock-array-constraints)",
         },
@@ -222,7 +222,7 @@ mock_array_all_sources = ["designs/src/mock-array/util.tcl"]
 orfs_flow(
     name = "Element",
     abstract_stage = "route",
-    stage_args = {
+    stage_arguments = {
         "synth": MOCK_ARRAY_ELEMENT_ALL | {
             "SDC_FILE": "$(location :mock-array-constraints)",
         },

flow/MODULE.bazel

@@ -7,7 +7,7 @@ module(
 bazel_dep(name = "bazel-orfs")
 git_override(
     module_name = "bazel-orfs",
-    commit = "16eb5dd5b31bdeacc0b3006a71dbce29076e9850",
+    commit = "b12fc7a172d4211315ec36214f872595e084ab25",
     remote = "https://github.com/The-OpenROAD-Project/bazel-orfs.git",
 )
 

flow/MODULE.bazel.lock

@@ -437,7 +437,7 @@ synth-report: synth
 
 .PHONY: do-synth-report
 do-synth-report:
-	($(TIME_CMD) $(OPENROAD_CMD) $(SCRIPTS_DIR)/synth_metrics.tcl) 2>&1 | tee $(LOG_DIR)/1_1_yosys_metrics.log
+	($(TIME_CMD) $(OPENROAD_CMD) $(SCRIPTS_DIR)/synth_metrics.tcl) 2>&1 | tee $(abspath $(LOG_DIR)/1_1_yosys_metrics.log)
 
 .PHONY: memory
 memory:
@@ -860,7 +860,7 @@ generate_abstract: $(RESULTS_DIR)/6_final.gds $(RESULTS_DIR)/6_final.def  $(RESU
 .PHONY: do-generate_abstract
 do-generate_abstract:
 	mkdir -p $(LOG_DIR) $(REPORTS_DIR)
-	($(TIME_CMD) $(OPENROAD_CMD) $(SCRIPTS_DIR)/generate_abstract.tcl -metrics $(LOG_DIR)/generate_abstract.json) 2>&1 | tee $(LOG_DIR)/generate_abstract.log
+	($(TIME_CMD) $(OPENROAD_CMD) $(SCRIPTS_DIR)/generate_abstract.tcl -metrics $(LOG_DIR)/generate_abstract.json) 2>&1 | tee $(abspath $(LOG_DIR)/generate_abstract.log)
 
 .PHONY: clean_abstract
 clean_abstract:
@@ -878,7 +878,7 @@ $(WRAPPED_GDSOAS): $(OBJECTS_DIR)/klayout_wrap.lyt $(WRAPPED_LEFS)
 	        -rd out_file=$@ \
 	        -rd tech_file=$(OBJECTS_DIR)/klayout_wrap.lyt \
 	        -rd layer_map=$(GDS_LAYER_MAP) \
-	        -r $(UTILS_DIR)/def2stream.py) 2>&1 | tee $(LOG_DIR)/6_merge_$(basename $(notdir $@)).log
+	        -r $(UTILS_DIR)/def2stream.py) 2>&1 | tee $(abspath $(LOG_DIR)/6_merge_$(basename $(notdir $@)).log)
 
 # Merge GDS using Klayout
 #-------------------------------------------------------------------------------
@@ -896,7 +896,7 @@ do-gds-merged:
 	        -rd out_file=$(GDS_MERGED_FILE) \
 	        -rd tech_file=$(OBJECTS_DIR)/klayout.lyt \
 	        -rd layer_map=$(GDS_LAYER_MAP) \
-	        -r $(UTILS_DIR)/def2stream.py) 2>&1 | tee $(LOG_DIR)/6_1_merge.log
+	        -r $(UTILS_DIR)/def2stream.py) 2>&1 | tee $(abspath $(LOG_DIR)/6_1_merge.log)
 
 $(RESULTS_DIR)/6_final.v: $(LOG_DIR)/6_report.log
 
@@ -916,15 +916,15 @@ ifneq ($(KLAYOUT_DRC_FILE),)
 	$(call KLAYOUT_FOUND)
 	($(TIME_CMD) $(KLAYOUT_CMD) -zz -rd in_gds="$<" \
 	        -rd report_file=$(abspath $@) \
-	        -r $(KLAYOUT_DRC_FILE)) 2>&1 | tee $(LOG_DIR)/6_drc.log
+	        -r $(KLAYOUT_DRC_FILE)) 2>&1 | tee $(abspath $(LOG_DIR)/6_drc.log)
 	# Hacky way of getting DRV count (don't error on no matches)
 	grep -c "<value>" $@ > $(REPORTS_DIR)/6_drc_count.rpt || [[ $$? == 1 ]]
 else
 	echo "DRC not supported on this platform" > $@
 endif
 
 $(RESULTS_DIR)/6_final.cdl: $(RESULTS_DIR)/6_final.v
-	($(TIME_CMD) $(OPENROAD_CMD) $(SCRIPTS_DIR)/cdl.tcl) 2>&1 | tee $(LOG_DIR)/6_cdl.log
+	($(TIME_CMD) $(OPENROAD_CMD) $(SCRIPTS_DIR)/cdl.tcl) 2>&1 | tee $(abspath $(LOG_DIR)/6_cdl.log)
 
 $(OBJECTS_DIR)/6_final_concat.cdl: $(RESULTS_DIR)/6_final.cdl $(CDL_FILE)
 	cat $^ > $@
@@ -938,7 +938,7 @@ ifneq ($(KLAYOUT_LVS_FILE),)
 	($(TIME_CMD) $(KLAYOUT_CMD) -b -rd in_gds="$<" \
 	        -rd cdl_file=$(abspath $(OBJECTS_DIR)/6_final_concat.cdl) \
 	        -rd report_file=$(abspath $@) \
-	        -r $(KLAYOUT_LVS_FILE)) 2>&1 | tee $(LOG_DIR)/6_lvs.log
+	        -r $(KLAYOUT_LVS_FILE)) 2>&1 | tee $(abspath $(LOG_DIR)/6_lvs.log)
 else
 	echo "LVS not supported on this platform" > $@
 endif

flow/Makefile

@@ -60,13 +60,14 @@ power:
 export DETAILED_ROUTE_END_ITERATION ?= 6
 
 export MAX_ROUTING_LAYER = M9
-export ROUTING_LAYER_ADJUSTMENT = 0.45
 
 # ensure we have some rows, so we don't get a bad clock skew.
 export MACRO_HALO_X            = 0.5
 export MACRO_HALO_Y            = 0.5
 
-export ADDITIONAL_FILES = designs/src/mock-array/util.tcl
+export ADDITIONAL_FILES = \
+ designs/src/mock-array/util.tcl \
+ designs/asap7/mock-array/macro-placement.tcl
 
 export IO_PLACER_V = M5 M7
 export IO_PLACER_H = M4 M6

flow/designs/asap7/mock-array/config.mk

@@ -211,8 +211,8 @@ FLOORPLAN_DEF:
 REMOVE_ABC_BUFFERS:
   description: >
     Remove abc buffers from the netlist. If timing repair in floorplanning is
-    taking too long, use a SETUP_HOLD_MARGIN to terminate timing repair early
-    instead of using REMOVE_ABC_BUFFERS or set SKIP_LAST_GAST=1.
+    taking too long, use a SETUP/HOLD_SLACK_MARGIN to terminate timing repair early
+    instead of using REMOVE_ABC_BUFFERS or set SKIP_LAST_GASP=1.
   stages:
     - floorplan
   deprecated: 1
@@ -384,16 +384,45 @@ HOLD_SLACK_MARGIN:
     This option allows you to overfix or underfix(negative value, terminate
     retiming before 0 or positive slack).
 
-    Use min of HOLD_SLACK_MARGIN and 0(default hold slack margin) in floorplan.
+    floorplan.tcl uses min of HOLD_SLACK_MARGIN and 0(default hold slack margin).
 
     This avoids overrepair in floorplan for hold by default, but allows skipping
     hold repair using a negative HOLD_SLACK_MARGIN.
 
     Exiting timing repair early is useful in exploration where
-
-    the .sdc has a fixed clock period at designs target clock period and where
+    the .sdc has a fixed clock period at the design's target clock period and where
     HOLD/SETUP_SLACK_MARGIN is used to avoid overrepair(extremely long running
     times) when exploring different parameter settings.
+
+    When an ideal clock is used, that is before CTS,
+    a clock insertion delay of 0 is used in timing paths. This creates
+    a mismatch between macros that have a .lib file from after CTS, when
+    the clock is propagated. To mitigate this, OpenSTA will use subtract
+    the clock insertion delay of macros when calculating timing with ideal
+    clock. Provided that min_clock_tree_path
+    and max_clock_tree_path are in the .lib file, which is the case for
+    macros built with OpenROAD. This is less accurate than if OpenROAD had
+    created a placeholder clock tree for timing estimation purposes
+    prior to CTS.
+
+    There will inevitably be inaccuracies in the timing calculation prior
+    to CTS. Use a slack margin that is low enough, even negative, to
+    avoid overrepair. Inaccuracies in the timing prior to CTS can also
+    lead to underrepair, but there no obvious and simple way to avoid
+    underrapir in these cases.
+
+    Overrepair can lead to excessive runtimes in repair or too much buffering
+    being added, which can present itself as congestion of hold cells or
+    buffer cells.
+
+    Another use of SETUP/HOLD_SLACK_MARGIN is design parameter exploration
+    when trying to find the minimum clock period for a design.
+
+    The SDC_FILE for a design can be quite complicated and instead of
+    modifying the clock period in the SDC_FILE, which can be non-trivial,
+    the clock period can be fixed at the target frequency and the
+    SETUP/HOLD_SLACK_MARGIN can be swept to find a plausible
+    current minimum clock period.
   stages:
     - cts
     - floorplan
@@ -404,6 +433,8 @@ SETUP_SLACK_MARGIN:
     Specifies a time margin for the slack when fixing setup violations.
     This option allows you to overfix or underfix(negative value, terminate
     retiming before 0 or positive slack).
+
+    See HOLD_SLACK_MARGIN for more details.
   stages:
     - cts
     - floorplan
@@ -814,3 +845,8 @@ RTLMP_ARGS:
     Overrides all other RTL macro placer arguments.
   stages:
     - floorplan
+GDS_ALLOW_EMPTY:
+  description: >
+    Regular expression of module names of macros that have no .gds file
+  stages:
+    - final