ci: update public pdk metrics

nangate45/tinyRocket base
[INFO] Tightening rule placeopt__design__instance__count__stdcell from 29642 to 29637.
[INFO] Tightening rule cts__timing__setup__ws from -0.3 to -0.28.
[INFO] Tightening rule cts__timing__setup__ws__pre_repair from -0.3 to -0.28.
[INFO] Tightening rule cts__timing__setup__ws__post_repair from -0.3 to -0.28.
[INFO] Tightening rule detailedroute__route__wirelength from 676445 to 669467.
[INFO] Tightening rule finish__design__instance__area from 60653 to 60640.
[INFO] Tightening rule finish__timing__drv__max_cap_limit from -0.28 to -0.24.

nangate45/aes base
[INFO] Tightening rule cts__timing__setup__ws__pre_repair from -0.46 to -0.43.
[INFO] Tightening rule cts__timing__setup__ws__post_repair from -0.46 to -0.43.
[INFO] Tightening rule finish__design__instance__area from 33726 to 33491.
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 10 to 200.

nangate45/swerv base
[INFO] Tightening rule synth__design__instance__area__stdcell from 175523.28 to 55557.26.
[INFO] Tightening rule placeopt__design__instance__area from 199047 to 60306.
[INFO] Tightening rule placeopt__design__instance__count__stdcell from 93692 to 29637.
[INFO] Tightening rule cts__timing__setup__ws from -0.4 to -0.28.
[INFO] Tightening rule cts__timing__setup__ws__pre_repair from -0.39 to -0.28.
[INFO] Tightening rule cts__timing__setup__ws__post_repair from -0.39 to -0.28.
[INFO] Tightening rule cts__design__instance__count__setup_buffer from 4074 to 1289.
[INFO] Tightening rule cts__design__instance__count__hold_buffer from 4074 to 1289.
[INFO] Tightening rule detailedroute__route__wirelength from 2686146 to 669467.
[INFO] Tightening rule finish__design__instance__area from 199962 to 60640.
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.37 to -0.2.
[INFO] Tightening rule finish__timing__drv__max_cap_limit from -1.64 to -0.24.

nangate45/swerv_wrapper base
[INFO] Tightening rule synth__design__instance__area__stdcell from 735404.71 to 55557.26.
[INFO] Tightening rule placeopt__design__instance__area from 760194 to 60306.
[INFO] Tightening rule placeopt__design__instance__count__stdcell from 107530 to 29637.
[INFO] Tightening rule cts__timing__setup__ws from -0.48 to -0.28.
[INFO] Tightening rule cts__timing__setup__ws__pre_repair from -0.49 to -0.28.
[INFO] Tightening rule cts__timing__setup__ws__post_repair from -0.49 to -0.28.
[INFO] Tightening rule cts__design__instance__count__setup_buffer from 4675 to 1289.
[INFO] Tightening rule cts__design__instance__count__hold_buffer from 4675 to 1289.
[INFO] Tightening rule detailedroute__route__wirelength from 4547098 to 669467.
[INFO] Tightening rule finish__timing__setup__ws from -0.17 to 0.0.
[INFO] Tightening rule finish__design__instance__area from 761229 to 60640.
[INFO] Tightening rule finish__timing__drv__max_cap_limit from -0.66 to -0.24.

nangate45/dynamic_node base
[INFO] Tightening rule cts__timing__setup__ws from -1.41 to -1.37.
[INFO] Tightening rule cts__timing__setup__ws__pre_repair from -1.41 to -1.37.
[INFO] Tightening rule cts__timing__setup__ws__post_repair from -1.41 to -1.37.
[INFO] Tightening rule finish__timing__setup__ws from -0.09 to -0.06.

nangate45/bp_multi_top base
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -1.39 to -0.47.
[INFO] Tightening rule finish__timing__drv__max_cap_limit from -0.3 to -0.26.

nangate45/gcd base
[INFO] Updating failing rule synth__design__instance__area__stdcell from 598 to 55557.26.
[INFO] Updating failing rule placeopt__design__instance__area from 622 to 60306.
[INFO] Updating failing rule placeopt__design__instance__count__stdcell from 508 to 29637.
[INFO] Tightening rule globalroute__timing__clock__slack from -0.1 to 0.0.
[INFO] Tightening rule globalroute__timing__setup__ws from -0.1 to 0.0.
[INFO] Updating failing rule detailedroute__route__wirelength from 2828 to 669467.
[INFO] Tightening rule finish__timing__setup__ws from -0.09 to 0.0.
[INFO] Updating failing rule finish__design__instance__area from 666 to 60640.
[INFO] Tightening rule finish__timing__wns_percent_delay from -30.02 to -10.0.

nangate45/jpeg base
[INFO] Tightening rule globalroute__timing__clock__slack from -0.06 to -0.04.
[INFO] Tightening rule globalroute__timing__setup__ws from -0.06 to -0.04.
[INFO] Tightening rule finish__timing__setup__ws from -0.32 to -0.12.
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 10 to 58.
[INFO] Tightening rule finish__timing__wns_percent_delay from -23.28 to -12.33.

asap7/uart-blocks base
[INFO] Tightening rule synth__design__instance__area__stdcell from 41 to 40.55.
[INFO] Tightening rule placeopt__design__instance__area from 361 to 358.
[INFO] Tightening rule placeopt__design__instance__count__stdcell from 1181 to 1176.
[INFO] Tightening rule cts__timing__setup__ws from -101.21 to -97.55.
[INFO] Tightening rule cts__timing__setup__ws__pre_repair from -119.15 to -119.08.
[INFO] Tightening rule cts__timing__setup__ws__post_repair from -119.15 to -119.08.
[INFO] Tightening rule globalroute__timing__clock__slack from -47.69 to -43.86.
[INFO] Tightening rule globalroute__timing__setup__ws from -47.69 to -43.86.
[INFO] Tightening rule detailedroute__route__wirelength from 2550 to 2531.
[INFO] Tightening rule finish__timing__setup__ws from -30.06 to -25.37.
[INFO] Tightening rule finish__design__instance__area from 364 to 362.
[INFO] Tightening rule finish__timing__wns_percent_delay from -14.62 to -13.23.

asap7/aes base
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 10 to 30.

asap7/jpeg base
[INFO] Tightening rule finish__design__instance__area from 7603 to 7599.
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 11 to 1042.

asap7/ibex base
[INFO] Tightening rule finish__design__instance__area from 2719 to 2718.
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.45 to -0.29.

asap7/riscv32i base
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -1.52 to -0.32.
[INFO] Updating failing rule finish__timing__drv__hold_violation_count from 10 to 136.

sky130hs/aes base
[INFO] Tightening rule synth__design__instance__area__stdcell from 173304 to 173303.57.
[INFO] Tightening rule placeopt__design__instance__count__stdcell from 21845 to 21843.
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.48 to -0.38.
[INFO] Updating failing rule finish__timing__drv__hold_violation_count from 10 to 281.

sky130hs/ibex base
[INFO] Tightening rule synth__design__instance__area__stdcell from 218186 to 218185.92.
[INFO] Tightening rule globalroute__timing__clock__slack from -0.6 to -0.51.
[INFO] Tightening rule globalroute__timing__setup__ws from -0.59 to -0.5.
[INFO] Tightening rule finish__timing__setup__ws from -0.58 to -0.54.
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.83 to -0.76.
[INFO] Tightening rule finish__timing__drv__max_cap_limit from -1.11 to -0.89.
[INFO] Updating failing rule finish__timing__drv__hold_violation_count from 10 to 30.

sky130hs/riscv32i base
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.66 to -0.41.

sky130hd/aes base
[INFO] Tightening rule placeopt__design__instance__area from 166764 to 166508.
[INFO] Tightening rule globalroute__timing__clock__slack from -0.51 to -0.39.
[INFO] Tightening rule globalroute__timing__setup__ws from -0.62 to -0.38.
[INFO] Tightening rule finish__timing__setup__ws from -0.7 to -0.31.
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.58 to -0.37.
[INFO] Updating failing rule finish__timing__drv__hold_violation_count from 10 to 142.

sky130hd/chameleon base
[INFO] Updating failing rule finish__timing__drv__hold_violation_count from 10 to 137.

sky130hd/ibex base
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 10 to 27.

sky130hd/jpeg base
[INFO] Tightening rule placeopt__design__instance__area from 570297 to 570147.
[INFO] Tightening rule globalroute__timing__clock__slack from -0.91 to -0.81.
[INFO] Tightening rule globalroute__timing__setup__ws from -0.92 to -0.81.
[INFO] Tightening rule finish__timing__setup__ws from -0.66 to -0.5.
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.28 to -0.27.
[INFO] Tightening rule finish__timing__drv__max_cap_limit from -0.24 to -0.23.

sky130hd/microwatt base
[WARNING] Multiple clocks not supported. Will use first clock.
[WARNING] Skipping string field globalroute__timing__clock__slack = N/A
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 10 to 106.
[INFO] Updating failing rule finish__timing__drv__hold_violation_count from 10 to 694.

gf180/ibex base
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 10 to 120.

gf180/jpeg base
[INFO] Tightening rule placeopt__design__instance__area from 2492912 to 2492866.
[INFO] Updating failing rule finish__timing__drv__setup_violation_count from 10 to 274.
[INFO] Updating failing rule finish__timing__drv__hold_violation_count from 10 to 83.

gf180/aes base
[INFO] Tightening rule finish__timing__drv__max_slew_limit from -0.66 to -0.42.

Signed-off-by: Vitor Bandeira <[email protected]>

Author: vvbandeira

flow/designs/asap7/aes/metadata-base-ok.json

@@ -9,6 +9,7 @@
   "cts__clock__skew__setup": 14.7663,
   "cts__clock__skew__setup__post_repair": 12.5163,
   "cts__clock__skew__setup__pre_repair": 12.5163,
+  "cts__cpu__total": 251.81,
   "cts__design__core__area": 5569.33,
   "cts__design__core__area__post_repair": 5569.33,
   "cts__design__core__area__pre_repair": 5569.33,
@@ -25,13 +26,13 @@
   "cts__design__instance__area__stdcell__post_repair": 2522.14,
   "cts__design__instance__area__stdcell__pre_repair": 2522.14,
   "cts__design__instance__count": 26066,
-  "cts__design__instance__count__hold_buffer": 743.0,
+  "cts__design__instance__count__hold_buffer": 743,
   "cts__design__instance__count__macros": 0,
   "cts__design__instance__count__macros__post_repair": 0,
   "cts__design__instance__count__macros__pre_repair": 0,
   "cts__design__instance__count__post_repair": 22657,
   "cts__design__instance__count__pre_repair": 22657,
-  "cts__design__instance__count__setup_buffer": 2666.0,
+  "cts__design__instance__count__setup_buffer": 2666,
   "cts__design__instance__count__stdcell": 26066,
   "cts__design__instance__count__stdcell__post_repair": 22657,
   "cts__design__instance__count__stdcell__pre_repair": 22657,
@@ -48,7 +49,21 @@
   "cts__design__io__post_repair": 388,
   "cts__design__io__pre_repair": 388,
   "cts__design__violations": 0,
+  "cts__mem__peak": 318112.0,
+  "cts__power__internal__total": 0.029624,
+  "cts__power__internal__total__post_repair": 0.0290198,
+  "cts__power__internal__total__pre_repair": 0.0290198,
+  "cts__power__leakage__total": 3.62289e-06,
+  "cts__power__leakage__total__post_repair": 3.12584e-06,
+  "cts__power__leakage__total__pre_repair": 3.12584e-06,
+  "cts__power__switching__total": 0.0465322,
+  "cts__power__switching__total__post_repair": 0.0506984,
+  "cts__power__switching__total__pre_repair": 0.0506984,
+  "cts__power__total": 0.0761598,
+  "cts__power__total__post_repair": 0.0797213,
+  "cts__power__total__pre_repair": 0.0797213,
   "cts__route__wirelength__estimated": 91736.9,
+  "cts__runtime__total": "4:12.10",
   "cts__timing__drv__hold_violation_count": 0,
   "cts__timing__drv__hold_violation_count__post_repair": 260,
   "cts__timing__drv__hold_violation_count__pre_repair": 260,
@@ -79,7 +94,10 @@
   "cts__timing__setup__ws": -27.6732,
   "cts__timing__setup__ws__post_repair": -150.755,
   "cts__timing__setup__ws__pre_repair": -150.755,
-  "detailedplace__cpu__total": 25.54,
+  "cts_fill__cpu__total": 2.5,
+  "cts_fill__mem__peak": 225608.0,
+  "cts_fill__runtime__total": "0:02.65",
+  "detailedplace__cpu__total": 26.84,
   "detailedplace__design__core__area": 5569.33,
   "detailedplace__design__die__area": 6214.96,
   "detailedplace__design__instance__area": 2496.85,
@@ -95,9 +113,13 @@
   "detailedplace__design__instance__utilization__stdcell": 0.448322,
   "detailedplace__design__io": 388,
   "detailedplace__design__violations": 0,
-  "detailedplace__mem__peak": 272648.0,
+  "detailedplace__mem__peak": 279060.0,
+  "detailedplace__power__internal__total": 0.0286086,
+  "detailedplace__power__leakage__total": 3.10543e-06,
+  "detailedplace__power__switching__total": 0.0498689,
+  "detailedplace__power__total": 0.0784805,
   "detailedplace__route__wirelength__estimated": 75436.7,
-  "detailedplace__runtime__total": "0:25.76",
+  "detailedplace__runtime__total": "0:27.04",
   "detailedplace__timing__drv__hold_violation_count": 0,
   "detailedplace__timing__drv__max_cap": 0,
   "detailedplace__timing__drv__max_cap_limit": 0.702414,
@@ -108,26 +130,29 @@
   "detailedplace__timing__drv__setup_violation_count": 371,
   "detailedplace__timing__setup__tns": -25310.8,
   "detailedplace__timing__setup__ws": -147.946,
+  "detailedroute__cpu__total": 5274.34,
+  "detailedroute__mem__peak": 5022036.0,
   "detailedroute__route__drc_errors": 0,
-  "detailedroute__route__drc_errors__iter:1": 7814,
-  "detailedroute__route__drc_errors__iter:2": 1260,
-  "detailedroute__route__drc_errors__iter:3": 967,
-  "detailedroute__route__drc_errors__iter:4": 1,
+  "detailedroute__route__drc_errors__iter:1": 7676,
+  "detailedroute__route__drc_errors__iter:2": 1043,
+  "detailedroute__route__drc_errors__iter:3": 824,
+  "detailedroute__route__drc_errors__iter:4": 2,
   "detailedroute__route__drc_errors__iter:5": 0,
   "detailedroute__route__net": 25501,
   "detailedroute__route__net__special": 2,
-  "detailedroute__route__vias": 224947,
+  "detailedroute__route__vias": 222426,
   "detailedroute__route__vias__multicut": 0,
-  "detailedroute__route__vias__singlecut": 224947,
-  "detailedroute__route__wirelength": 107768,
-  "detailedroute__route__wirelength__iter:1": 108650,
-  "detailedroute__route__wirelength__iter:2": 107982,
-  "detailedroute__route__wirelength__iter:3": 107773,
-  "detailedroute__route__wirelength__iter:4": 107767,
-  "detailedroute__route__wirelength__iter:5": 107768,
-  "finish__clock__skew__hold": 16.9658,
-  "finish__clock__skew__setup": 16.5131,
-  "finish__cpu__total": 55.09,
+  "detailedroute__route__vias__singlecut": 222426,
+  "detailedroute__route__wirelength": 107465,
+  "detailedroute__route__wirelength__iter:1": 108376,
+  "detailedroute__route__wirelength__iter:2": 107645,
+  "detailedroute__route__wirelength__iter:3": 107467,
+  "detailedroute__route__wirelength__iter:4": 107465,
+  "detailedroute__route__wirelength__iter:5": 107465,
+  "detailedroute__runtime__total": "5:58.78",
+  "finish__clock__skew__hold": 15.0495,
+  "finish__clock__skew__setup": 15.3232,
+  "finish__cpu__total": 57.98,
   "finish__design__core__area": 5569.33,
   "finish__design__die__area": 6214.96,
   "finish__design__instance__area": 2854.27,
@@ -139,20 +164,27 @@
   "finish__design__instance__utilization": 0.512498,
   "finish__design__instance__utilization__stdcell": 0.512498,
   "finish__design__io": 388,
-  "finish__mem__peak": 1452784.0,
-  "finish__runtime__total": "0:55.54",
-  "finish__timing__drv__hold_violation_count": 0.0,
+  "finish__mem__peak": 1454904.0,
+  "finish__power__internal__total": 0.0359893,
+  "finish__power__leakage__total": 3.62289e-06,
+  "finish__power__switching__total": 0.0559079,
+  "finish__power__total": 0.0919008,
+  "finish__runtime__total": "0:58.32",
+  "finish__timing__drv__hold_violation_count": 0,
   "finish__timing__drv__max_cap": 0,
-  "finish__timing__drv__max_cap_limit": 0.700104,
+  "finish__timing__drv__max_cap_limit": 0.697003,
   "finish__timing__drv__max_fanout": 0,
   "finish__timing__drv__max_fanout_limit": 0,
   "finish__timing__drv__max_slew": 0,
-  "finish__timing__drv__max_slew_limit": 0.150706,
-  "finish__timing__drv__setup_violation_count": 1.0,
-  "finish__timing__setup__tns": -147.887,
-  "finish__timing__setup__ws": -26.4503,
-  "finish__timing__wns_percent_delay": -4.851525,
-  "floorplan__cpu__total": 2.22,
+  "finish__timing__drv__max_slew_limit": 0.136501,
+  "finish__timing__drv__setup_violation_count": 17,
+  "finish__timing__setup__tns": -183.581,
+  "finish__timing__setup__ws": -30.3195,
+  "finish__timing__wns_percent_delay": -5.528082,
+  "finish_merge__cpu__total": 5.93,
+  "finish_merge__mem__peak": 437244.0,
+  "finish_merge__runtime__total": "0:06.97",
+  "floorplan__cpu__total": 6.66,
   "floorplan__design__core__area": 5569.33,
   "floorplan__design__die__area": 6214.96,
   "floorplan__design__instance__area": 2128.42,
@@ -164,11 +196,30 @@
   "floorplan__design__instance__utilization": 0.382168,
   "floorplan__design__instance__utilization__stdcell": 0.382168,
   "floorplan__design__io": 388,
-  "floorplan__mem__peak": 190664.0,
-  "floorplan__runtime__total": "0:02.33",
+  "floorplan__mem__peak": 238848.0,
+  "floorplan__power__internal__total": 0.0265073,
+  "floorplan__power__leakage__total": 2.52794e-06,
+  "floorplan__power__switching__total": 0.0343169,
+  "floorplan__power__total": 0.0608268,
+  "floorplan__runtime__total": "0:06.99",
   "floorplan__timing__setup__tns": -210064,
   "floorplan__timing__setup__ws": -1777.33,
-  "globalplace__cpu__total": 15.42,
+  "floorplan_io__cpu__total": 2.19,
+  "floorplan_io__mem__peak": 193468.0,
+  "floorplan_io__runtime__total": "0:02.30",
+  "floorplan_macro__cpu__total": 2.21,
+  "floorplan_macro__mem__peak": 192636.0,
+  "floorplan_macro__runtime__total": "0:02.33",
+  "floorplan_pdn__cpu__total": 2.49,
+  "floorplan_pdn__mem__peak": 195668.0,
+  "floorplan_pdn__runtime__total": "0:02.61",
+  "floorplan_tap__cpu__total": 2.16,
+  "floorplan_tap__mem__peak": 180564.0,
+  "floorplan_tap__runtime__total": "0:02.26",
+  "floorplan_tdms__cpu__total": 2.22,
+  "floorplan_tdms__mem__peak": 194780.0,
+  "floorplan_tdms__runtime__total": "0:02.31",
+  "globalplace__cpu__total": 73.87,
   "globalplace__design__core__area": 5569.33,
   "globalplace__design__die__area": 6214.96,
   "globalplace__design__instance__area": 2152.62,
@@ -180,14 +231,25 @@
   "globalplace__design__instance__utilization": 0.386514,
   "globalplace__design__instance__utilization__stdcell": 0.386514,
   "globalplace__design__io": 388,
-  "globalplace__mem__peak": 252828.0,
-  "globalplace__runtime__total": "0:15.61",
+  "globalplace__mem__peak": 430168.0,
+  "globalplace__power__internal__total": 0.0269701,
+  "globalplace__power__leakage__total": 2.52794e-06,
+  "globalplace__power__switching__total": 0.042593,
+  "globalplace__power__total": 0.0695656,
+  "globalplace__runtime__total": "1:14.12",
   "globalplace__timing__setup__tns": -450260,
   "globalplace__timing__setup__ws": -2955.35,
+  "globalplace_io__cpu__total": 2.23,
+  "globalplace_io__mem__peak": 197556.0,
+  "globalplace_io__runtime__total": "0:02.35",
+  "globalplace_skip_io__cpu__total": 8.94,
+  "globalplace_skip_io__mem__peak": 223528.0,
+  "globalplace_skip_io__runtime__total": "0:09.07",
   "globalroute__antenna__violating__nets": 0,
   "globalroute__antenna__violating__pins": 0,
   "globalroute__clock__skew__hold": 15.6901,
   "globalroute__clock__skew__setup": 15.6901,
+  "globalroute__cpu__total": 17.92,
   "globalroute__design__core__area": 5569.33,
   "globalroute__design__die__area": 6214.96,
   "globalroute__design__instance__area": 2854.27,
@@ -199,6 +261,12 @@
   "globalroute__design__instance__utilization": 0.512498,
   "globalroute__design__instance__utilization__stdcell": 0.512498,
   "globalroute__design__io": 388,
+  "globalroute__mem__peak": 574752.0,
+  "globalroute__power__internal__total": 0.0358877,
+  "globalroute__power__leakage__total": 3.62289e-06,
+  "globalroute__power__switching__total": 0.0567211,
+  "globalroute__power__total": 0.0926124,
+  "globalroute__runtime__total": "0:18.27",
   "globalroute__timing__clock__slack": -38.796,
   "globalroute__timing__drv__hold_violation_count": 0,
   "globalroute__timing__drv__max_cap": 0,
@@ -210,7 +278,7 @@
   "globalroute__timing__drv__setup_violation_count": 167,
   "globalroute__timing__setup__tns": -3305.45,
   "globalroute__timing__setup__ws": -38.7959,
-  "placeopt__cpu__total": 15.42,
+  "placeopt__cpu__total": 18.74,
   "placeopt__design__core__area": 5569.33,
   "placeopt__design__core__area__pre_opt": 5569.33,
   "placeopt__design__die__area": 6214.96,
@@ -233,8 +301,16 @@
   "placeopt__design__instance__utilization__stdcell__pre_opt": 0.386514,
   "placeopt__design__io": 388,
   "placeopt__design__io__pre_opt": 388,
-  "placeopt__mem__peak": 252828.0,
-  "placeopt__runtime__total": "0:15.61",
+  "placeopt__mem__peak": 259212.0,
+  "placeopt__power__internal__total": 0.0284258,
+  "placeopt__power__internal__total__pre_opt": 0.0269701,
+  "placeopt__power__leakage__total": 3.10543e-06,
+  "placeopt__power__leakage__total__pre_opt": 2.52794e-06,
+  "placeopt__power__switching__total": 0.0496979,
+  "placeopt__power__switching__total__pre_opt": 0.042593,
+  "placeopt__power__total": 0.0781268,
+  "placeopt__power__total__pre_opt": 0.0695656,
+  "placeopt__runtime__total": "0:18.93",
   "placeopt__timing__drv__hold_violation_count": 0,
   "placeopt__timing__drv__max_cap": 0,
   "placeopt__timing__drv__max_cap_limit": 0.702038,
@@ -248,10 +324,10 @@
   "placeopt__timing__setup__ws": -150.643,
   "placeopt__timing__setup__ws__pre_opt": -2955.35,
   "run__flow__design": "aes",
-  "run__flow__generate_date": "2023-06-18 00:47",
+  "run__flow__generate_date": "2023-07-15 22:51",
   "run__flow__metrics_version": "Metrics_2.1.2",
   "run__flow__openroad_commit": "N/A",
-  "run__flow__openroad_version": "v2.0-8760-gc8a48928f",
+  "run__flow__openroad_version": "v2.0-9070-gbb341ffb9",
   "run__flow__platform": "asap7",
   "run__flow__platform__capacitance_units": "1fF",
   "run__flow__platform__current_units": "1mA",
@@ -260,14 +336,14 @@
   "run__flow__platform__resistance_units": "1kohm",
   "run__flow__platform__time_units": "1ps",
   "run__flow__platform__voltage_units": "1v",
-  "run__flow__platform_commit": "732ef8d8080f7d11825909a2f1f697908c2d374f",
-  "run__flow__scripts_commit": "732ef8d8080f7d11825909a2f1f697908c2d374f",
-  "run__flow__uuid": "e4b45cc3-3f53-4519-9e35-2c34ac2aedb9",
+  "run__flow__platform_commit": "42ca04d0df7aa58eb296a6d96b4dd4ecb6cf0469",
+  "run__flow__scripts_commit": "42ca04d0df7aa58eb296a6d96b4dd4ecb6cf0469",
+  "run__flow__uuid": "127864d9-3f52-4d54-9dc3-7c84d7f210d0",
   "run__flow__variant": "base",
-  "synth__cpu__total": 142.83,
+  "synth__cpu__total": 140.96,
   "synth__design__instance__area__stdcell": 2240.12952,
   "synth__design__instance__count__stdcell": 22235.0,
-  "synth__mem__peak": 707528.0,
-  "synth__runtime__total": "2:26.35",
-  "total_time": "0:04:21.200000"
+  "synth__mem__peak": 706136.0,
+  "synth__runtime__total": "2:23.95",
+  "total_time": "0:16:31.350000"
 }

flow/designs/asap7/aes/rules-base.json

@@ -76,7 +76,7 @@
         "compare": ">="
     },
     "finish__timing__drv__setup_violation_count": {
-        "value": 10,
+        "value": 30,
         "compare": "<="
     },
     "finish__timing__drv__hold_violation_count": {