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lines changed- .github/workflows/extra-builds.yml+1-1
- .github/workflows/test-build.yml+8-4
- CHANGELOG+7
- Makefile+2-2
- docs/source/cell/word_mux.rst+2-2
- docs/source/conf.py+1-1
- docs/source/yosys_internals/verilog.rst+4-4
- frontends/verific/verific.cc+2
- frontends/verific/verificsva.cc+5-2
- frontends/verilog/verilog_frontend.cc+1-1
- frontends/verilog/verilog_lexer.l+1-2
- frontends/verilog/verilog_parser.y+36-11
- kernel/driver.cc+1
- kernel/yosys.cc+3-2
- passes/cmds/splitnets.cc+5-1
- passes/opt/opt_dff.cc+11-3
- passes/techmap/attrmap.cc+9-15
- techlibs/gowin/cells_xtra.py+10
- techlibs/gowin/cells_xtra_gw5a.v+575-26
- tests/opt/bug5164.ys+60
- tests/proc/case_attr.ys+57
- tests/various/splitnets.ys+32
- tests/verific/run-test.sh+1
- tests/verilog/bug5160.v+5
- tests/verilog/unique_priority_case.ys+54
- tests/verilog/unique_priority_if.ys+54
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