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1 parent ec8a1b0 commit 77f91a1Copy full SHA for 77f91a1
flow/scripts/variables.yaml
@@ -110,6 +110,14 @@ LIB_FILES:
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DONT_USE_CELLS:
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description: >
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Dont use cells eases pin access in detailed routing.
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+SYNTH_GUT:
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+ description: >
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+ Load design and remove all internal logic before doing synthesis. This
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+ is useful when creating a mock .lef abstract that has a smaller area
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+ than the amount of logic would allow. bazel-orfs uses this to mock
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+ SRAMs, for instance.
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+ stages:
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+ - synth
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SYNTH_HIERARCHICAL:
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Enable to Synthesis hierarchically, otherwise considered flat synthesis.
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