asap7: constraints.sdc max delay excludes clock latency

Signed-off-by: Øyvind Harboe <[email protected]>

Author: oharboe

flow/platforms/asap7/constraints.sdc

@@ -74,11 +74,11 @@ set non_clk_inputs [all_inputs -no_clocks]
 # Optimization targets: overconstrain by default and
 # leave refinements to a more design specific constraints.sdc file.
 #
-# Minimum time for io-io, io-reg, reg-io paths in macro is on
-# the order of 80ps for a small macro on ASAP7.
-set_max_delay [expr { [info exists in2reg_max] ? $in2reg_max : 80 }] -from $non_clk_inputs \
+# Minimum time, excluding clock latency, for io-io, io-reg, reg-io
+# paths in macro is on the order of 80ps for a small macro on ASAP7.
+set_max_delay -ignore_clock_latency [expr { [info exists in2reg_max] ? $in2reg_max : 80 }] -from $non_clk_inputs \
   -to [all_registers]
-set_max_delay [expr { [info exists reg2out_max] ? $reg2out_max : 80 }] -from [all_registers] \
+set_max_delay -ignore_clock_latency [expr { [info exists reg2out_max] ? $reg2out_max : 80 }] -from [all_registers] \
   -to [all_outputs]
 set_max_delay [expr { [info exists in2out_max] ? $in2out_max : 80 }] -from $non_clk_inputs \
   -to [all_outputs]