Skip to content

Commit 7c94471

Browse files
precisionmoonprecisionmoon
committed
Merge remote-tracking branch 'origin/master' into secure-crit-vt-swap-test
2 parents 51422c1 + f441fbb commit 7c94471

File tree

16 files changed

+58
-201
lines changed

16 files changed

+58
-201
lines changed

‎docs/user/FlowVariables.md‎

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -126,16 +126,17 @@ configuration file.
126126
| <a name="DFF_LIB_FILES"></a>DFF_LIB_FILES| Technology mapping liberty files for flip-flops.| |
127127
| <a name="DIE_AREA"></a>DIE_AREA| The die area specified as a list of lower-left and upper-right corners in microns (X1 Y1 X2 Y2).| |
128128
| <a name="DONT_USE_CELLS"></a>DONT_USE_CELLS| Dont use cells eases pin access in detailed routing.| |
129-
| <a name="DONT_USE_LIBS"></a>DONT_USE_LIBS| Set liberty files as `dont_use`.| |
130129
| <a name="DPO_MAX_DISPLACEMENT"></a>DPO_MAX_DISPLACEMENT| Specifies how far an instance can be moved when optimizing.| 5 1|
131130
| <a name="EARLY_SIZING_CAP_RATIO"></a>EARLY_SIZING_CAP_RATIO| Ratio between the input pin capacitance and the output pin load during initial gate sizing.| |
132131
| <a name="ENABLE_DPO"></a>ENABLE_DPO| Enable detail placement with improve_placement feature.| 1|
133132
| <a name="EQUIVALENCE_CHECK"></a>EQUIVALENCE_CHECK| Enable running equivalence checks to verify logical correctness of repair_timing.| 0|
134133
| <a name="FASTROUTE_TCL"></a>FASTROUTE_TCL| Specifies a Tcl script with commands to run before FastRoute.| |
135134
| <a name="FILL_CELLS"></a>FILL_CELLS| Fill cells are used to fill empty sites. If not set or empty, fill cell insertion is skipped.| |
136135
| <a name="FILL_CONFIG"></a>FILL_CONFIG| JSON rule file for metal fill during chip finishing.| |
137-
| <a name="FLOORPLAN_DEF"></a>FLOORPLAN_DEF| Use the DEF file to initialize floorplan.| |
136+
| <a name="FLOORPLAN_DEF"></a>FLOORPLAN_DEF| Use the DEF file to initialize floorplan. Mutually exclusive with FOOTPRINT or DIE_AREA/CORE_AREA or CORE_UTILIZATION.| |
138137
| <a name="FLOW_VARIANT"></a>FLOW_VARIANT| Flow variant to use, used in the flow variant directory name.| base|
138+
| <a name="FOOTPRINT"></a>FOOTPRINT| Custom footprint definition file for ICeWall-based floorplan initialization. Mutually exclusive with FLOORPLAN_DEF or DIE_AREA/CORE_AREA or CORE_UTILIZATION.| |
139+
| <a name="FOOTPRINT_TCL"></a>FOOTPRINT_TCL| Specifies a Tcl script with custom footprint-related commands for floorplan setup.| |
139140
| <a name="GDS_ALLOW_EMPTY"></a>GDS_ALLOW_EMPTY| Regular expression of module names of macros that have no .gds file| |
140141
| <a name="GDS_FILES"></a>GDS_FILES| Path to platform GDS files.| |
141142
| <a name="GENERATE_ARTIFACTS_ON_FAILURE"></a>GENERATE_ARTIFACTS_ON_FAILURE| For instance Bazel needs artifacts (.odb and .rpt files) on a failure to allow the user to save hours on re-running the failed step locally, but when working with a Makefile flow, it is more natural to fail the step and leave the user to manually inspect the logs and artifacts directly via the file system. Set to 1 to change the behavior to generate artifacts upon failure to e.g. do a global route. The exit code will still be non-zero on all other failures that aren't covered by the "useful to inspect the artifacts on failure" use-case. Example: just like detailed routing, a global route that fails with congestion, is not a build failure(as in exit code non-zero), it is a successful(as in zero exit code) global route that produce reports detailing the problem. Detailed route will not proceed, if there is global routing congestion This allows build systems, such as bazel, to create artifacts for global and detailed route, even if the operation had problems, without having know about the semantics between global and detailed route. Considering that global and detailed route can run for a long time and use a lot of memory, this allows inspecting results on a laptop for a build that ran on a server.| 0|
@@ -293,6 +294,8 @@ configuration file.
293294
- [CORE_UTILIZATION](#CORE_UTILIZATION)
294295
- [DIE_AREA](#DIE_AREA)
295296
- [FLOORPLAN_DEF](#FLOORPLAN_DEF)
297+
- [FOOTPRINT](#FOOTPRINT)
298+
- [FOOTPRINT_TCL](#FOOTPRINT_TCL)
296299
- [HOLD_SLACK_MARGIN](#HOLD_SLACK_MARGIN)
297300
- [IO_CONSTRAINTS](#IO_CONSTRAINTS)
298301
- [MACRO_BLOCKAGE_HALO](#MACRO_BLOCKAGE_HALO)
@@ -466,7 +469,6 @@ configuration file.
466469
- [DESIGN_NICKNAME](#DESIGN_NICKNAME)
467470
- [DFF_LIB_FILES](#DFF_LIB_FILES)
468471
- [DONT_USE_CELLS](#DONT_USE_CELLS)
469-
- [DONT_USE_LIBS](#DONT_USE_LIBS)
470472
- [DPO_MAX_DISPLACEMENT](#DPO_MAX_DISPLACEMENT)
471473
- [ENABLE_DPO](#ENABLE_DPO)
472474
- [FASTROUTE_TCL](#FASTROUTE_TCL)

‎flow/Makefile‎

Lines changed: 3 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -179,19 +179,6 @@ build_macros: $(BLOCK_LEFS) $(BLOCK_TYP_LIBS)
179179
$(foreach block,$(BLOCKS),$(eval $(call GENERATE_ABSTRACT_RULE,$(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/${block}.lef,$(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/${block}_typ.lib,$(shell dirname $(DESIGN_CONFIG))/${block}/config.mk)))
180180
$(foreach block,$(BLOCKS),$(eval $(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/6_final.gds: $(WORK_HOME)/results/$(PLATFORM)/$(DESIGN_NICKNAME)_$(block)/$(FLOW_VARIANT)/${block}.lef))
181181

182-
# Pre-process libraries
183-
# ==============================================================================
184-
185-
# Create temporary Liberty files which have the proper dont_use properties set
186-
# For use with Yosys and ABC
187-
.SECONDEXPANSION:
188-
$(DONT_USE_LIBS): $$(filter %$$(@F) %$$(@F).gz,$(LIB_FILES))
189-
@mkdir -p $(OBJECTS_DIR)/lib
190-
$(PYTHON_EXE) $(UTILS_DIR)/preprocessLib.py -i $^ -o $@
191-
192-
$(OBJECTS_DIR)/lib/merged.lib: $(DONT_USE_LIBS)
193-
$(PYTHON_EXE) $(UTILS_DIR)/merge_lib.py $(PLATFORM)_merged $(DONT_USE_LIBS) > $@
194-
195182
# Pre-process KLayout tech
196183
# ==============================================================================
197184
$(OBJECTS_DIR)/klayout_tech.lef: $(TECH_LEF)
@@ -272,11 +259,11 @@ $(SDC_FILE_CLOCK_PERIOD): $(SDC_FILE)
272259
yosys-dependencies: $(YOSYS_DEPENDENCIES)
273260

274261
.PHONY: do-yosys
275-
do-yosys: $(DONT_USE_SC_LIB)
262+
do-yosys: yosys-dependencies
276263
$(SCRIPTS_DIR)/synth.sh $(SYNTH_SCRIPT) $(LOG_DIR)/1_2_yosys.log
277264

278265
.PHONY: do-yosys-canonicalize
279-
do-yosys-canonicalize: yosys-dependencies $(DONT_USE_SC_LIB)
266+
do-yosys-canonicalize: yosys-dependencies
280267
$(SCRIPTS_DIR)/synth.sh $(SCRIPTS_DIR)/synth_canonicalize.tcl $(LOG_DIR)/1_1_yosys_canonicalize.log
281268

282269
$(RESULTS_DIR)/1_1_yosys_canonicalize.rtlil: $(YOSYS_DEPENDENCIES)
@@ -405,7 +392,7 @@ endef
405392

406393
$(eval $(call do-step,1_3_synth,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc,synth_odb))
407394

408-
$(eval $(call do-step,2_1_floorplan,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc $(TECH_LEF) $(SC_LEF) $(ADDITIONAL_LEFS) $(FOOTPRINT) $(SIG_MAP_FILE) $(FOOTPRINT_TCL) $(DONT_USE_SC_LIB) $(IO_CONSTRAINTS),floorplan))
395+
$(eval $(call do-step,2_1_floorplan,$(RESULTS_DIR)/1_synth.v $(RESULTS_DIR)/1_synth.sdc $(TECH_LEF) $(SC_LEF) $(ADDITIONAL_LEFS) $(FOOTPRINT) $(SIG_MAP_FILE) $(FOOTPRINT_TCL) $(LIB_FILES) $(IO_CONSTRAINTS),floorplan))
409396

410397
$(eval $(call do-copy,2_floorplan,2_1_floorplan.sdc,,.sdc))
411398

‎flow/designs/gf12/ca53/config.mk‎

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -54,6 +54,9 @@ export MACRO_PLACE_HALO = 7 7
5454

5555
export MACRO_WRAPPERS = $(DESIGN_DIR)/wrappers.tcl
5656

57+
# Temporarily disable NDR for clock nets
58+
export CTS_ARGS = -sink_clustering_enable -balance_levels -repair_clock_nets -distance_between_buffers 100 -apply_ndr none
59+
5760
#export MAX_ROUTING_LAYER = H2
5861
export FASTROUTE_TCL = $(DESIGN_DIR)/fastroute.tcl
5962
#

‎flow/designs/gf180/aes-hybrid/rules-base.json‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,18 +1,18 @@
11
{
22
"synth__design__instance__area__stdcell": {
3-
"value": 624425.81,
3+
"value": 493531.52,
44
"compare": "<="
55
},
66
"constraints__clocks__count": {
77
"value": 1,
88
"compare": "=="
99
},
1010
"placeopt__design__instance__area": {
11-
"value": 798562,
11+
"value": 657615,
1212
"compare": "<="
1313
},
1414
"placeopt__design__instance__count__stdcell": {
15-
"value": 22568,
15+
"value": 22088,
1616
"compare": "<="
1717
},
1818
"detailedplace__design__violations": {
@@ -28,11 +28,11 @@
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
31-
"value": 3,
31+
"value": 2,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
35-
"value": 1623163,
35+
"value": 1503800,
3636
"compare": "<="
3737
},
3838
"detailedroute__route__drc_errors": {
@@ -44,15 +44,15 @@
4444
"compare": "<="
4545
},
4646
"detailedroute__antenna_diodes_count": {
47-
"value": 5,
47+
"value": 9,
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {
51-
"value": -1.16,
51+
"value": -1.35,
5252
"compare": ">="
5353
},
5454
"finish__design__instance__area": {
55-
"value": 803898,
55+
"value": 779709,
5656
"compare": "<="
5757
},
5858
"finish__timing__drv__setup_violation_count": {

‎flow/designs/sky130hd/jpeg/config.mk‎

Lines changed: 0 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -13,6 +13,3 @@ export TNS_END_PERCENT = 100
1313
export FASTROUTE_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/fastroute.tcl
1414

1515
export REMOVE_ABC_BUFFERS = 1
16-
17-
# workaround for density growing to 0.91 from adjustments on TD/RD iterations
18-
export GPL_ROUTABILITY_DRIVEN = 0

‎flow/designs/sky130hd/jpeg/rules-base.json‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -28,7 +28,7 @@
2828
"compare": "<="
2929
},
3030
"globalroute__antenna_diodes_count": {
31-
"value": 166,
31+
"value": 153,
3232
"compare": "<="
3333
},
3434
"detailedroute__route__wirelength": {
@@ -44,7 +44,7 @@
4444
"compare": "<="
4545
},
4646
"detailedroute__antenna_diodes_count": {
47-
"value": 93,
47+
"value": 170,
4848
"compare": "<="
4949
},
5050
"finish__timing__setup__ws": {

‎flow/platforms/asap7/config.mk‎

Lines changed: 0 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -201,11 +201,6 @@ export DB_FILES += $(realpath $($(CORNER)_DB_FILES))
201201
export TEMPERATURE = $($(CORNER)_TEMPERATURE)
202202
export VOLTAGE = $($(CORNER)_VOLTAGE)
203203

204-
# FIXME Need merged.lib for now, but ideally it shouldn't be necessary:
205-
#
206-
# https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/pull/2139
207-
export DONT_USE_SC_LIB = $(OBJECTS_DIR)/lib/merged.lib
208-
209204
# ---------------------------------------------------------
210205
# IR Drop
211206
# ---------------------------------------------------------

‎flow/platforms/asap7/openRoad/post_mergeLib.py‎

Lines changed: 0 additions & 26 deletions
This file was deleted.

‎flow/scripts/floorplan.tcl‎

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -43,24 +43,26 @@ puts "number instances in verilog is $num_instances"
4343
set additional_args ""
4444
append_env_var additional_args ADDITIONAL_SITES -additional_sites 1
4545

46+
# Check which floorplan initialization method is specified (mutually exclusive)
4647
set use_floorplan_def [env_var_exists_and_non_empty FLOORPLAN_DEF]
4748
set use_footprint [env_var_exists_and_non_empty FOOTPRINT]
4849
set use_die_and_core_area \
4950
[expr { [env_var_exists_and_non_empty DIE_AREA] && [env_var_exists_and_non_empty CORE_AREA] }]
5051
set use_core_utilization [env_var_exists_and_non_empty CORE_UTILIZATION]
5152

53+
# Enforce mutual exclusion - exactly one method must be specified
5254
set methods_defined \
5355
[expr { $use_floorplan_def + $use_footprint + $use_die_and_core_area + $use_core_utilization }]
5456
if { $methods_defined > 1 } {
5557
puts "Error: Floorplan initialization methods are mutually exclusive, pick one."
5658
exit 1
5759
}
5860

61+
# Method 1: Use existing DEF file with floorplan data
5962
if { $use_floorplan_def } {
60-
# Initialize floorplan by reading in floorplan DEF
6163
log_cmd read_def -floorplan_initialize $env(FLOORPLAN_DEF)
64+
# Method 2: Use ICeWall footprint file (platform-specific extension)
6265
} elseif { $use_footprint } {
63-
# Initialize floorplan using ICeWall FOOTPRINT
6466
ICeWall load_footprint $env(FOOTPRINT)
6567

6668
initialize_floorplan \
@@ -69,11 +71,13 @@ if { $use_floorplan_def } {
6971
-site $::env(PLACE_SITE)
7072

7173
ICeWall init_footprint $env(SIG_MAP_FILE)
74+
# Method 3: Use explicit die and core area coordinates
7275
} elseif { $use_die_and_core_area } {
7376
initialize_floorplan -die_area $::env(DIE_AREA) \
7477
-core_area $::env(CORE_AREA) \
7578
-site $::env(PLACE_SITE) \
7679
{*}$additional_args
80+
# Method 4: Calculate core area from utilization, aspect ratio, and margins
7781
} elseif { $use_core_utilization } {
7882
initialize_floorplan -utilization $::env(CORE_UTILIZATION) \
7983
-aspect_ratio $::env(CORE_ASPECT_RATIO) \
@@ -85,6 +89,7 @@ if { $use_floorplan_def } {
8589
exit 1
8690
}
8791

92+
# Create routing tracks: MAKE_TRACKS script, platform make_tracks.tcl, or make_tracks command
8893
if { [env_var_exists_and_non_empty MAKE_TRACKS] } {
8994
log_cmd source $::env(MAKE_TRACKS)
9095
} elseif { [file exists $::env(PLATFORM_DIR)/make_tracks.tcl] } {
@@ -93,6 +98,8 @@ if { [env_var_exists_and_non_empty MAKE_TRACKS] } {
9398
make_tracks
9499
}
95100

101+
# Configure global routing: FASTROUTE_TCL script or
102+
# set_global_routing_layer_adjustment/set_routing_layers
96103
if { [env_var_exists_and_non_empty FASTROUTE_TCL] } {
97104
log_cmd source $::env(FASTROUTE_TCL)
98105
} else {

‎flow/scripts/synth.tcl‎

Lines changed: 3 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -105,17 +105,12 @@ if { [env_var_exists_and_non_empty LATCH_MAP_FILE] } {
105105
techmap -map $::env(LATCH_MAP_FILE)
106106
}
107107

108-
set dfflibmap_args ""
109-
foreach cell $::env(DONT_USE_CELLS) {
110-
lappend dfflibmap_args -dont_use $cell
111-
}
112-
113108
# Technology mapping of flip-flops
114109
# dfflibmap only supports one liberty file
115110
if { [env_var_exists_and_non_empty DFF_LIB_FILE] } {
116-
dfflibmap -liberty $::env(DFF_LIB_FILE) {*}$dfflibmap_args
111+
dfflibmap -liberty $::env(DFF_LIB_FILE) {*}$lib_dont_use_args
117112
} else {
118-
dfflibmap -liberty $::env(DONT_USE_SC_LIB) {*}$dfflibmap_args
113+
dfflibmap {*}$lib_args {*}$lib_dont_use_args
119114
}
120115
opt
121116

@@ -150,7 +145,7 @@ insbuf -buf {*}$::env(MIN_BUF_CELL_AND_PORTS)
150145
# Reports
151146
tee -o $::env(REPORTS_DIR)/synth_check.txt check
152147

153-
tee -o $::env(REPORTS_DIR)/synth_stat.txt stat {*}$stat_libs
148+
tee -o $::env(REPORTS_DIR)/synth_stat.txt stat {*}$lib_args
154149

155150
# check the design is composed exclusively of target cells, and
156151
# check for other problems

0 commit comments

Comments
 (0)