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Merge remote-tracking branch 'private/master' into secure-gpl-less-inflation
2 parents 9a4f806 + 8f0c83f commit 7dae5b8

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‎flow/designs/gf12/bp_dual/rules-base.json‎

Lines changed: 159 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,34 +1,179 @@
11
{
2+
"cts__flow__warnings__count:CTS-0041": {
3+
"value": 21,
4+
"compare": "<=",
5+
"level": "warning"
6+
},
7+
"cts__flow__warnings__count:RSZ-0062": {
8+
"value": 1,
9+
"compare": "<=",
10+
"level": "warning"
11+
},
12+
"cts__flow__warnings__count:STA-1551": {
13+
"value": 40,
14+
"compare": "<=",
15+
"level": "warning"
16+
},
17+
"detailedplace__flow__warnings__count:STA-1551": {
18+
"value": 40,
19+
"compare": "<=",
20+
"level": "warning"
21+
},
22+
"detailedroute__flow__warnings__count:DRT-0120": {
23+
"value": 54,
24+
"compare": "<=",
25+
"level": "warning"
26+
},
27+
"detailedroute__flow__warnings__count:DRT-0142": {
28+
"value": 5,
29+
"compare": "<=",
30+
"level": "warning"
31+
},
32+
"detailedroute__flow__warnings__count:STA-1551": {
33+
"value": 40,
34+
"compare": "<=",
35+
"level": "warning"
36+
},
37+
"finish__flow__warnings__count:STA-1551": {
38+
"value": 40,
39+
"compare": "<=",
40+
"level": "warning"
41+
},
42+
"floorplan__flow__warnings__count:EST-0027": {
43+
"value": 1,
44+
"compare": "<=",
45+
"level": "warning"
46+
},
47+
"floorplan__flow__warnings__count:IFP-0028": {
48+
"value": 1,
49+
"compare": "<=",
50+
"level": "warning"
51+
},
52+
"floorplan__flow__warnings__count:ODB-0254": {
53+
"value": 3,
54+
"compare": "<=",
55+
"level": "warning"
56+
},
57+
"floorplan__flow__warnings__count:ODB-0256": {
58+
"value": 5,
59+
"compare": "<=",
60+
"level": "warning"
61+
},
62+
"floorplan__flow__warnings__count:ODB-0260": {
63+
"value": 2,
64+
"compare": "<=",
65+
"level": "warning"
66+
},
67+
"floorplan__flow__warnings__count:STA-1551": {
68+
"value": 40,
69+
"compare": "<=",
70+
"level": "warning"
71+
},
72+
"flow__warnings__count:PDN-0110": {
73+
"value": 1001,
74+
"compare": "<=",
75+
"level": "warning"
76+
},
77+
"flow__warnings__count:PDN-0231": {
78+
"value": 8,
79+
"compare": "<=",
80+
"level": "warning"
81+
},
82+
"flow__warnings__count:PDN-1031": {
83+
"value": 1,
84+
"compare": "<=",
85+
"level": "warning"
86+
},
87+
"flow__warnings__count:STA-1551": {
88+
"value": 40,
89+
"compare": "<=",
90+
"level": "warning"
91+
},
92+
"flow__warnings__count:TAP-0014": {
93+
"value": 1,
94+
"compare": "<=",
95+
"level": "warning"
96+
},
97+
"flow__warnings__count:TAP-0015": {
98+
"value": 1,
99+
"compare": "<=",
100+
"level": "warning"
101+
},
102+
"flow__warnings__count:TAP-0016": {
103+
"value": 1,
104+
"compare": "<=",
105+
"level": "warning"
106+
},
107+
"flow__warnings__count:TAP-0017": {
108+
"value": 1,
109+
"compare": "<=",
110+
"level": "warning"
111+
},
112+
"globalplace__flow__warnings__count:STA-1551": {
113+
"value": 40,
114+
"compare": "<=",
115+
"level": "warning"
116+
},
117+
"globalroute__flow__warnings__count:DRT-0120": {
118+
"value": 54,
119+
"compare": "<=",
120+
"level": "warning"
121+
},
122+
"globalroute__flow__warnings__count:DRT-0142": {
123+
"value": 5,
124+
"compare": "<=",
125+
"level": "warning"
126+
},
127+
"globalroute__flow__warnings__count:FLW-0010": {
128+
"value": 1,
129+
"compare": "<=",
130+
"level": "warning"
131+
},
132+
"globalroute__flow__warnings__count:STA-1551": {
133+
"value": 40,
134+
"compare": "<=",
135+
"level": "warning"
136+
},
137+
"placeopt__flow__warnings__count:RSZ-0095": {
138+
"value": 1,
139+
"compare": "<=",
140+
"level": "warning"
141+
},
142+
"placeopt__flow__warnings__count:STA-1551": {
143+
"value": 40,
144+
"compare": "<=",
145+
"level": "warning"
146+
},
2147
"constraints__clocks__count": {
3148
"value": 8,
4149
"compare": "=="
5150
},
6151
"placeopt__design__instance__area": {
7-
"value": 838053,
152+
"value": 836829,
8153
"compare": "<="
9154
},
10155
"placeopt__design__instance__count__stdcell": {
11-
"value": 912187,
156+
"value": 908653,
12157
"compare": "<="
13158
},
14159
"detailedplace__design__violations": {
15160
"value": 0,
16161
"compare": "=="
17162
},
18163
"cts__design__instance__count__setup_buffer": {
19-
"value": 79321,
164+
"value": 79013,
20165
"compare": "<="
21166
},
22167
"cts__design__instance__count__hold_buffer": {
23-
"value": 79321,
168+
"value": 79013,
24169
"compare": "<="
25170
},
26171
"cts__timing__setup__ws": {
27-
"value": -749.3529,
172+
"value": -193.0,
28173
"compare": ">="
29174
},
30175
"cts__timing__setup__tns": {
31-
"value": -319752.0,
176+
"value": -4660.0,
32177
"compare": ">="
33178
},
34179
"cts__timing__hold__ws": {
@@ -44,11 +189,11 @@
44189
"compare": "<="
45190
},
46191
"globalroute__timing__setup__ws": {
47-
"value": -186.2825,
192+
"value": -100.0,
48193
"compare": ">="
49194
},
50195
"globalroute__timing__setup__tns": {
51-
"value": -1224.108,
196+
"value": -400.0,
52197
"compare": ">="
53198
},
54199
"globalroute__timing__hold__ws": {
@@ -60,7 +205,7 @@
60205
"compare": ">="
61206
},
62207
"detailedroute__route__wirelength": {
63-
"value": 13768051,
208+
"value": 12984371,
64209
"compare": "<="
65210
},
66211
"detailedroute__route__drc_errors": {
@@ -76,19 +221,19 @@
76221
"compare": "<="
77222
},
78223
"detailedroute__timing__setup__ws": {
79-
"value": -343.209,
224+
"value": -307.0,
80225
"compare": ">="
81226
},
82227
"detailedroute__timing__setup__tns": {
83-
"value": -2840.8439,
228+
"value": -2500.0,
84229
"compare": ">="
85230
},
86231
"detailedroute__timing__hold__ws": {
87232
"value": -47.5581,
88233
"compare": ">="
89234
},
90235
"detailedroute__timing__hold__tns": {
91-
"value": -5653.608,
236+
"value": -2850.0,
92237
"compare": ">="
93238
},
94239
"finish__timing__setup__ws": {
@@ -104,15 +249,11 @@
104249
"compare": ">="
105250
},
106251
"finish__timing__hold__tns": {
107-
"value": -40.3385,
252+
"value": -443.0,
108253
"compare": ">="
109254
},
110255
"finish__design__instance__area": {
111-
"value": 852120,
256+
"value": 851537,
112257
"compare": "<="
113-
},
114-
"finish__timing__wns_percent_delay": {
115-
"value": -16.84,
116-
"compare": ">="
117258
}
118259
}

‎flow/designs/ihp-sg13g2/aes/rules-base.json‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -140,4 +140,4 @@
140140
"value": 1054989,
141141
"compare": "<="
142142
}
143-
}
143+
}

‎flow/designs/ihp-sg13g2/gcd/constraint.sdc‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@ current_design gcd
22

33
set clk_name core_clock
44
set clk_port_name clk
5-
set clk_period 2.6
5+
set clk_period 2.8
66
set clk_io_pct 0.2
77

88
set clk_port [get_ports $clk_port_name]

‎flow/designs/ihp-sg13g2/gcd/rules-base.json‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -30,19 +30,19 @@
3030
"level": "warning"
3131
},
3232
"synth__design__instance__area__stdcell": {
33-
"value": 5458.22361,
33+
"value": 6828.9632,
3434
"compare": "<="
3535
},
3636
"constraints__clocks__count": {
3737
"value": 1,
3838
"compare": "=="
3939
},
4040
"placeopt__design__instance__area": {
41-
"value": 6195,
41+
"value": 7382,
4242
"compare": "<="
4343
},
4444
"placeopt__design__instance__count__stdcell": {
45-
"value": 494,
45+
"value": 614,
4646
"compare": "<="
4747
},
4848
"detailedplace__design__violations": {
@@ -94,7 +94,7 @@
9494
"compare": ">="
9595
},
9696
"detailedroute__route__wirelength": {
97-
"value": 12621,
97+
"value": 15132,
9898
"compare": "<="
9999
},
100100
"detailedroute__route__drc_errors": {
@@ -142,7 +142,7 @@
142142
"compare": ">="
143143
},
144144
"finish__design__instance__area": {
145-
"value": 26057,
145+
"value": 7693,
146146
"compare": "<="
147147
}
148-
}
148+
}

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/I2cDeviceCtrl/pdn.tcl‎

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -25,14 +25,14 @@ global_connect
2525
set_voltage_domain -name {CORE} -power {VDD} -ground {VSS}
2626

2727
# stdcell grid
28-
define_pdn_grid -name {grid} -voltage_domains {CORE}
28+
define_pdn_grid -name {grid} -voltage_domains {CORE} -pins {Metal4 Metal5}
2929
add_pdn_stripe -grid {grid} -layer {Metal1} -width {0.44} -pitch {7.56} -offset {0} \
30-
-followpins -extend_to_core_ring
31-
add_pdn_ring -grid {grid} -layers {Metal3 Metal4} -widths {3.0} -spacings {2.0} \
30+
-followpins
31+
add_pdn_ring -grid {grid} -layers {Metal4 Metal5} -widths {3.0} -spacings {2.0} \
3232
-core_offsets {4.5} -connect_to_pads
33-
add_pdn_stripe -grid {grid} -layer {Metal3} -width {1.840} -pitch {75.6} -offset {37.8} \
33+
add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {13.6} \
3434
-extend_to_core_ring
35-
add_pdn_stripe -grid {grid} -layer {Metal4} -width {1.840} -pitch {75.6} -offset {37.8} \
35+
add_pdn_stripe -grid {grid} -layer {Metal5} -width {1.840} -pitch {75.6} -offset {13.6} \
3636
-extend_to_core_ring
37-
add_pdn_connect -grid {grid} -layers {Metal1 Metal3}
38-
add_pdn_connect -grid {grid} -layers {Metal3 Metal4}
37+
add_pdn_connect -grid {grid} -layers {Metal1 Metal4}
38+
add_pdn_connect -grid {grid} -layers {Metal4 Metal5}

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/config.mk‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -8,14 +8,14 @@ export SDC_FILE = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
88

99
export SEAL_GDS = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/sealring.gds.gz
1010

11-
export DIE_AREA = 0.0 0.0 1050.0 1050.0
11+
export DIE_AREA = 0.0 0.0 1050.24 1050.84
1212
export CORE_AREA = 351.36 351.54 699.84 699.3
1313

1414
export MAX_ROUTING_LAYER = TopMetal2
1515

1616
export TNS_END_PERCENT = 100
1717
export PLACE_DENSITY = 0.75
18-
18+
export MACRO_PLACE_HALO = 20 20
1919
export CORNERS = slow fast
2020

2121
export FOOTPRINT_TCL = $(DESIGN_HOME)/$(PLATFORM)/$(DESIGN_NICKNAME)/pad.tcl

‎flow/designs/ihp-sg13g2/i2c-gpio-expander/constraint.sdc‎

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10,6 +10,9 @@ create_clock [get_pins sg13g2_IOPad_io_clock/p2c] -name clk_core -period 20.0 -w
1010
set_clock_uncertainty 0.15 [get_clocks clk_core]
1111
set_clock_transition 0.25 [get_clocks clk_core]
1212

13+
set input_delay_value_clk_core 4.0
14+
set output_delay_value_clk_core 4.0
15+
1316
set clock_ports [get_ports {
1417
io_clock_PAD
1518
}]
@@ -26,16 +29,16 @@ set clk_core_inout_16mA_ports [get_ports {
2629
io_gpio_7_PAD
2730
}]
2831
set_driving_cell -lib_cell sg13g2_IOPadInOut16mA -pin pad $clk_core_inout_16mA_ports
29-
set_input_delay 8 -clock clk_core $clk_core_inout_16mA_ports
30-
set_output_delay 8 -clock clk_core $clk_core_inout_16mA_ports
32+
set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_inout_16mA_ports
33+
set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_inout_16mA_ports
3134

3235
set clk_core_inout_4mA_ports [get_ports {
3336
io_i2c_scl_PAD
3437
io_i2c_sda_PAD
3538
}]
3639
set_driving_cell -lib_cell sg13g2_IOPadInOut4mA -pin pad $clk_core_inout_4mA_ports
37-
set_input_delay 8 -clock clk_core $clk_core_inout_4mA_ports
38-
set_output_delay 8 -clock clk_core $clk_core_inout_4mA_ports
40+
set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_inout_4mA_ports
41+
set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_inout_4mA_ports
3942

4043
set clk_core_input_ports [get_ports {
4144
io_reset_PAD
@@ -44,13 +47,13 @@ set clk_core_input_ports [get_ports {
4447
io_address_2_PAD
4548
}]
4649
set_driving_cell -lib_cell sg13g2_IOPadIn -pin pad $clk_core_input_ports
47-
set_input_delay 8 -clock clk_core $clk_core_input_ports
50+
set_input_delay $input_delay_value_clk_core -clock clk_core $clk_core_input_ports
4851

4952
set clk_core_output_4mA_ports [get_ports {
5053
io_i2c_interrupt_PAD
5154
}]
5255
set_driving_cell -lib_cell sg13g2_IOPadOut4mA -pin pad $clk_core_output_4mA_ports
53-
set_output_delay 8 -clock clk_core $clk_core_output_4mA_ports
56+
set_output_delay $output_delay_value_clk_core -clock clk_core $clk_core_output_4mA_ports
5457

5558
set_load -pin_load 5 [all_inputs]
5659
set_load -pin_load 5 [all_outputs]

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