We read every piece of feedback, and take your input very seriously.
To see all available qualifiers, see our documentation.
There was an error while loading. Please reload this page.
2 parents d616b86 + 678e856 commit 7eae37dCopy full SHA for 7eae37d
flow/platforms/asap7/README.md
@@ -14,7 +14,7 @@ The package contain
14
15
* lib - timing libraries for both standard cells and memory macros
16
* lef - LEF file format for physical design implementation for both
17
- stardard cells and memory macros
+ standard cells and memory macros
18
* verilog - verilog model for memory macros
19
* gds - GDS for standard cells
20
0 commit comments