Merge remote-tracking branch 'public/master' into recover_power

* public/master:
  swap the recover_power secure CI/CD tests (since no access to debug failures)
  reduce power recovery to meet timing (can't debug for now due to lack of access)
  add power recovery to secure CI/CD cases
  update with power recovery code for secure CI/CD

Author: vvbandeira

flow/designs/gf12/aes/config.mk

@@ -6,14 +6,15 @@ export VERILOG_FILES = $(sort $(wildcard ./designs/src/$(DESIGN_NICKNAME)/*.v))
 export SDC_FILE      = ./designs/$(PLATFORM)/$(DESIGN_NICKNAME)/constraint.sdc
 export ABC_AREA      = 1
 
-export CORE_UTILIZATION = 40
+export CORE_UTILIZATION  = 40
 export CORE_ASPECT_RATIO = 1
-export CORE_MARGIN = 2
+export CORE_MARGIN       = 2
 
-export PLACE_DENSITY = 0.80
+export PLACE_DENSITY     = 0.80
 
 ifneq ($(USE_FILL),)
 export DESIGN_TYPE = CELL
 else
 export DESIGN_TYPE = CELL_NODEN
 endif
+

flow/designs/gf12/jpeg/config.mk

@@ -13,11 +13,12 @@ export CORE_ASPECT_RATIO = 1
 export CORE_MARGIN = 2
 
 export PLACE_DENSITY = 0.75
-export SKIP_PIN_SWAP = 1
 
 ifneq ($(USE_FILL),)
 export DESIGN_TYPE = CELL
 else
 export DESIGN_TYPE = CELL_NODEN
 endif
+
+export SKIP_PIN_SWAP     = 1
 export SKIP_GATE_CLONING = 1

flow/designs/gf55/aes/config.mk

@@ -19,6 +19,7 @@ export CORE_ASPECT_RATIO = 1
 export CORE_MARGIN       = 4
 
 export PLACE_DENSITY     = 0.50
+export RECOVER_POWER     = 100
 
 ifneq ($(USE_FILL),)
 export DESIGN_TYPE = CELL

flow/designs/tsmc65lp/aes/config.mk

@@ -11,3 +11,4 @@ export CORE_ASPECT_RATIO = 1
 export CORE_MARGIN = 5
 
 export PLACE_DENSITY = 0.70
+export RECOVER_POWER = 100